HD6417618 datasheet(632/646 Pages) RENESAS

632 / 646 page

Rev. 6.00 Jun. 12, 2007 Page 600 of 610

REJ09B0131-0600

Item

Page Revision (See Manual for Details)

14.4.3 Synchronous Operation

Clock

376

Amended

When only receiving, the clock signal outputs while the

RE bit of SCSCR is 1 and the number of data in receive

FIFO is less than the receive FIFO data trigger number.

In this case, 8

× (16 + 1) = 136 pulses of synchronous

clock are output. To perform reception of n characters

of data, select an external clock as the clock source. If

an internal clock should be used, set RE = 1 and TE =

1 and receive n characters of data simultaneously with

the transmission of n characters of dummy data.

Figure 14.13 Sample Flowchart

for Transmitting Serial Data

378

Amended

Start of transmission

Read TDFE flag in SCFSR

TDFE = 1?

Write transmit data to SCFTDR

Read TDFE and TEND flags

in SCFSR while they are 1, then

clear them to 0

Yes

[1] SCIF status check and transmit data

write:

Read SCFSR and check that the

TDFE flag is set to 1, then write

transmit data to SCFTDR. Read the

TDFE and TEND flags while they are

1, then clear them to 0.

[2] Serial transmission continuation

procedeure:

To continue serial transmission, read

1 from the TDFE flag to confirm that

writing is possible, them write data to

[1]

Figure 14.18 Sample Flowchart

for Transmitting/Receiving Serial

Data

382

Amended

Start of transmission and reception

Initialization

Read TDFE flag in SCFSR

TDFE = 1?

Write transmit data to SCFTDR

Read TDFE and TEND flags

in SCFSR while they are 1, then

clear them to 0

Yes

[1] SCIF status check and transmit data

write:

Read SCFSR and check that the

TDFE flag is set to 1, then write

transmit data to SCFTDR. Read the

TDFE and TEND flags while they are

1, then clear them to 0. The transition

of the TDFE flag from 0 to 1 can also

be identified by a TXI interrupt.

[2] Receive error handling:

Read the ORER flag in SCLSR to

identify any error, perform the

appropriate error handling, then clear

the ORER flag to 0. Reception cannot

be resumed while the ORER flag is

set to 1.

[3] SCIF status check and receive data

read:

[1]

19.6 Usage Notes

470

Added

2. Since the HIFMD pin is not initially set to function as

a general port pin, it must be pulled up or down

externally to fix its state.

3. When using a multiplexed pin with a function not

selected with its initial value (for example, using the

PB12/

CS3 pin, the initial function of which is PB12,

as the

CS3 pin), the pin must be pulled up or down

externally at least after a reset until its pin function is

selected by software to fix its state.

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