HD6417618 datasheet(423/646 Pages) RENESAS

423 / 646 page

Section 15 Host Interface (HIF)

IFHIF00A_000020030900

Rev. 6.00 Jun. 12, 2007 Page 391 of 610

REJ09B0131-0600

Section 15 Host Interface (HIF)

This LSI incorporates a host interface (HIF) for use in high-speed transfer of data between

external devices which cannot utilize the system bus.

The HIF allows external devices to read from and write to 2 kbytes (1 kbyte

× 2 banks) of the on-

chip RAM exclusively for HIF use (HIFRAM) within this LSI, in 32-bit units. Interrupts issued to

this LSI by an external device, interrupts sent from this LSI to the external device, and DMA

transfer requests sent from this LSI to the external device are also supported. By using HIFRAM

and these interrupt functions, software-based data transfer between external devices and this LSI

becomes possible, and connection to external devices not releasing bus mastership is enabled.

Using HIFRAM, the HIF also supports HIF boot mode allowing this LSI to be booted.

15.1

Features

The HIF has the following features.

• An external device can read from or write to HIFRAM in 32-bit units via the HIF pins (access

in 8-bit or 16-bit units not allowed). The on-chip CPU can read from or write to HIFRAM in 8-

bit, 16-bit, or 32-bit units, via the internal peripheral bus. The HIFRAM access mode can be

specified as bank mode or non-bank mode.

• When an external device accesses HIFRAM via the HIF pins, automatic increment of

addresses and the endian can be specified with the HIF internal registers.

• By writing to specific bits in the HIF internal registers from an external device, or by accessing

the end address of HIFRAM from the external device, interrupts (internal interrupts) can be

issued to the on-chip CPU. Conversely, by writing to specific bits in the HIF internal registers

from the on-chip CPU, interrupts (external interrupts) or DMAC transfer requests can be sent

from the on-chip CPU to the external device.

• There are seven interrupt source bits each for internal interrupts and external interrupts.

Accordingly, software control of 128 different interrupts is possible, enabling high-speed data

transfer using interrupts.

• In HIF boot mode, this LSI can be booted from HIFRAM by an external device storing the

instruction code in HIFRAM.

HD6417618 Datasheet(PDF) 423 Page - Renesas Technology Corp