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HD6417618 Datasheet(PDF) 399 Page - Renesas Technology Corp |
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HD6417618 Datasheet(HTML) 399 Page - Renesas Technology Corp |
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399 / 646 page ![]() Section 14 Serial Communication Interface with FIFO (SCIF) Rev. 6.00 Jun. 12, 2007 Page 367 of 610 REJ09B0131-0600 Figure 14.3 shows a sample flowchart for initializing the SCIF. Start of initialization Clear TE and RE bits in SCSCR to 0 Set TFRST and RFRST bits in SCFCR to 1 Set CKE1 and CKE0 bits in SCSCR (leaving TE, RE, TIE, and RIE bits cleared to 0) Set data transfer format in SCSMR Set value in SCBRR 1-bit interval elapsed? Set RTRG1-0 and TTRG1-0 bits in SCFCR, and clear TFRST and RFRST bits to 0 Set TE and RE bits in SCSCR to 1, and set TIE, RIE, and REIE bits End of initialization Wait No Yes Set the clock selection in SCSCR. Be sure to clear bits TIE, RIE, TE, and RE to 0. Set the data transfer format in SCSMR. Write a value corresponding to the bit rate into SCBRR. (Not necessary if an external clock is used.) Wait at least one bit interval, then set the TE bit or RE bit in SCSCR to 1. Also set the RIE, REIE, and TIE bits. Setting the TE bit enables the TxD and RxD pins to be used. When transmitting, the SCIF will go to the mark state; when receiving, it will go to the idle state, waiting for a start bit. [1] [1] [2] [3] [4] [2] [3] [4] After reading BRK, DR, and ER flags in SCFSR, and each flag in SCLSR, write 0 to clear them Figure 14.3 Sample Flowchart for SCIF Initialization |
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