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HD6417618 Datasheet(PDF) 477 Page - Renesas Technology Corp |
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HD6417618 Datasheet(HTML) 477 Page - Renesas Technology Corp |
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477 / 646 page ![]() Section 16 Pin Function Controller (PFC) Rev. 6.00 Jun. 12, 2007 Page 445 of 610 REJ09B0131-0600 Bit Bit Name Initial Value R/W Description 6 PC3MD0 0 R/W PC3 Mode Selects the function of pin PC03/MII_RXD3. 0: PC03 input/output (port) 1: MII_RXD3 input (EtherC) 5 0 R Reserved This bit is always read as 0. The write value should always be 0. 4 PC2MD0 0 R/W PC2 Mode Selects the function of pin PC02/MII_RXD2. 0: PC02 input/output (port) 1: MII_RXD2 input (EtherC) 3 0 R Reserved This bit is always read as 0. The write value should always be 0. 2 PC1MD0 0 R/W PC1 Mode Selects the function of pin PC01/MII_RXD1. 0: PC01 input/output (port) 1: MII_RXD1 input (EtherC) 1 0 R Reserved This bit is always read as 0. The write value should always be 0. 0 PC0MD0 0 R/W PC0 Mode Selects the function of pin PC00/MII_RXD0. 0: PC00 input/output (port) 1: MII_RXD0 input (EtherC) 16.1.7 Port D IO Register L (PDIORL) PDIORL is a 16-bit readable/writable register that selects the input/output directions of the port D pins. Bits PD7IOR to PD0IOR correspond to pins PD7 to PD0 (the pin name abbreviations for multiplexed functions are omitted). PDIORL is enabled when a port C pin functions as a general input/output (PD7 to PD0), otherwise, disabled. |
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