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HD6417618 Datasheet(PDF) 394 Page - Renesas Technology Corp

Part # HD6417618
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
PDF  646 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6417618 Datasheet(HTML) 394 Page - Renesas Technology Corp

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Section 14 Serial Communication Interface with FIFO (SCIF)
Rev. 6.00 Jun. 12, 2007 Page 362 of 610
REJ09B0131-0600
14.4
Operation
14.4.1
Overview
For serial communication, the SCIF has an asynchronous mode in which characters are
synchronized individually, and a synchronous mode in which communication is synchronized with
clock pulses. The SCIF has a 16-byte FIFO buffer for both transmit and receive operations,
reducing the overhead of the CPU, and enabling continuous high-speed communication.
Moreover, it has
RTS and CTS signals as modem control signals (for channels 0 and 1). The
transmission format is selected in the serial mode register (SCSMR). The SCIF clock source is
selected by the combination of the CKE1 and CKE0 bits in the serial control register (SCSCR).
Asynchronous Mode:
• Data length is selectable: 7 or 8 bits.
• Parity bit is selectable. So is the stop bit length (1 or 2 bits). The combination of the preceding
selections constitutes the communication format and character length.
• In receiving, it is possible to detect framing errors, parity errors, receive FIFO data full,
overrun errors, receive data ready, and breaks.
• The number of stored data bytes is indicated for both the transmit and receive FIFO registers.
• An internal or external clock can be selected as the SCIF clock source.
 When an internal clock is selected, the SCIF operates using the on-chip baud rate
generator.
 When an external clock is selected, the external clock input must have a frequency 16 times
the bit rate. (The on-chip baud rate generator is not used.)
Synchronous Mode:
• The transmission/reception format has a fixed 8-bit data length.
• In receiving, it is possible to detect overrun errors (ORER).
• An internal or external clock can be selected as the SCIF clock source.
 When an internal clock is selected, the SCIF operates using the on-chip baud rate
generator, and outputs a serial clock signal to external devices.
 When an external clock is selected, the SCIF operates on the input serial clock. The on-
chip baud rate generator is not used.



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