HD6417618 datasheet(378/646 Pages) RENESAS

Part #	HD6417618

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

PDF	646 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 14 Serial Communication Interface with FIFO (SCIF)

Rev. 6.00 Jun. 12, 2007 Page 346 of 610

REJ09B0131-0600

14.3.8

Bit Rate Register (SCBRR)

SCBRR is an 8-bit register that, together with the baud rate generator clock source selected by the

CKS1 and CKS0 bits in the serial mode register (SCSMR), determines the serial transmit/receive

bit rate.

The CPU can always read and write to SCBRR. SCBRR is initialized to H'FF by a power-on reset.

Each channel has independent baud rate generator control, so different values can be set in three

channels.

The SCBRR setting is calculated as follows:

• Asynchronous mode:

N =

× 106 - 1

× 22n-1 × B

• Synchronous mode:

N =

× 106 - 1

× 22n-1 × B

Bit rate (bits/s)

SCBRR setting for baud rate generator (0

≤ N ≤ 255)

(The setting value should satisfy the electrical characteristics.)

φ: Operating frequency for peripheral modules (MHz)

Baud rate generator clock source (n

= 0, 1, 2, 3) (for the clock sources and values of

n, see table 14.2.)

HD6417618 Datasheet(PDF) 378 Page - Renesas Technology Corp