34708 datasheet(158/159 Pages) FREESCALE

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Analog Integrated Circuit Device Data



Freescale Semiconductor

158

MC34708

Revision History

REVISION

DATE

DESCRIPTION OF CHANGES

6.0

7/2011

• Initial release

7.0

10/2011

• Corrected the two pins SW2PWGD and SDWNB, and associated drawings.

• Changed LED Driver Electrical Specifications, VPLL Matching from 3.0 to 4.0%

• Changed VPLL Electrical Specification, tON-VPLL from 100 to 120 s

• Changed SWBST Electrical Specifications, ILEAK_SWBST from 5.0 to 6.0 A

• Added Max limit to Charger Input Current Limit (Using the USB input).

• Added note (58) to VREFDDR

• Changed RUSB ON value to 5.0 typ, 8.0 max

• Set MIC bias to 1.5 V, and changed ON resistance values to 75 typ and 150 max.

• Added Efficiency values for all Buck Converter

• Added diodes to the LX pin on SW1, SW2, SW3, SW4A, SW4B, and SW5.

• Updated schematics to reflect the LX pin diodes on SW1, SW2, SW3, SW4A, SW4B, and SW5, and

removed the 10

F VBUSVIN input capacitor.

8.0

7/2012

• Removed charger and coulomb counter functionality throughout the document. Section 7.6

removed.

• Updated Figure 1, Figure 2, Figure 3, Figure 4 , Figure 38, Figure 20, Figure 26, Figure 28,

Figure 30, Figure 31, Figure 40.

• Update Table 3

• Pin function changed to “O” on pins VCORE, VCOREDIG, VALWAYS, VCOREREF,

VDDLP, and TSREF.

• Pin function to “I” on pins ADIN11, TSX1/ADIN12, TSX2/ADIN13, TSY1/ADIN14 and

TSY2/ADIN15

• Description for unsupported charger and coulomb counter pins modified.

• Clarified ICTEST description

• Update Table 4 with maximum pin rating for all blocks.

• Added Table 7 “Die Temp Debounce Settings”

• Updated thermal monitor operation in section 5.2.1

• Removed PRETMR, ITRICKLE, VSRT and ADC specifications in Table 9.

• Changed typ current spec for ON Standby (LPM) from 260 uA to 340uA, changed ON Standby

Digital Core from 370uA to 480uA and removed all charger conditions in Table 10.

• Updated section 6.1 feature list

• Renamed all instances of APSKIP to APS.

• Updated Table 15: VSRTC quiescent current to 1.7uA @1.2V setting and 2.7uA @ 1.3V

setting.

• GLBRSTTMR[1:0], value “00” changed to Invalid option in Table 24.

• Removed interrupt, mask and sense bit related to charger and coulomb counter in Table 21.

• Changed debounce time for THERMxxx interrupts.

• Updated SW4A/B operation and removed 3.3V setting from SW4A/B in section 7.5.4.6

• Removed AUX attach in section 7.5.3.4

• Replaced “Under Voltage Detection” event in section 7.5.3.5 with “BP lower than VBAT_TRKL”

event.

• Changed UVDET threshold to 3.1V (rising)/ 2.65V (falling) in Table 27

• Added PWMPS mode description on Table 31

• Changed quiescent currents for all switching regulators ISWxQ in PWMPS and APS modes.

• LDO Short Circuit Protection feature no longer supported.

• Changed ADC channels 4 and 7 to “Reserved”

• Added Figure 19

• Removed VBATTREMTH specification from Table 77

• Added section 7.8.3

• Removed charger support from section 7.8.4

• Removed IVBUS quiescent current specification for dedicated charger condition in Table 97

34708 Datasheet(PDF) 158 Page - Freescale Semiconductor, Inc

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