STM32H562II datasheet(210/270 Pages) STMICROELECTRONICS

210 / 270 page

Electrical characteristics

STM32H562xx and STM32H563xx

210/270

DS14258 Rev 5

Figure 59. Power supply and reference decoupling (VREF+ connected to VDDA)

1. VREF+ input is not available on all packages (refer to Table 14), VREF- is available only on UFBGA176+25,

UFBGA169 with SMPS, LQFP100, UFBGA169, and UFBGA176+25 packages. When VREF- is not

available, it is internally connected to VSSA. If VREF- is available and connected to VDDA, refer to Figure 20

for more detailsIf.

5.3.24

DAC characteristics

MSv50649V1

1 μF // 100 nF

STM32

VREF+/VDDA

(1)

VREF-/VSSA

(1)

Table 98. DAC characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDDA

Analog supply voltage

1.8

3.3

3.6

VREF+

Positive reference voltage

1.8

VDDA

VREF-

Negative reference voltage

VSSA

Resistive load

DAC output buffer

Connected

to VSSA

kΩ

Connected

to VDDA

Output impedance

DAC output buffer OFF

10.3

RBON

Output impedance sample

and hold mode, output

buffer ON

DAC output buffer

VDD = 2.7 V

1.6

kΩ

VDD = 2.0 V

2.6

RBOFF

Output impedance sample

and hold mode, output

buffer OFF

DAC output buffer

OFF

VDD = 2.7 V

17.8

kΩ

VDD = 2.0 V

18.7

Capacitive load

DAC output buffer OFF

CSH

Sample and Hold mode

0.1

µF

VDAC_OUT

Voltage on DAC_OUT

output

DAC output buffer ON

0.2

VDDA

−0.2

DAC output buffer OFF

VREF+

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