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STM32H562II Datasheet(PDF) 57 Page - STMicroelectronics

Part # STM32H562II
Description  Arm® Cortex®-M33 32-bit MCU TrustZone® FPU, 375 DMIPS, 250 MHz, 2-Mbyte flash, 640-Kbyte RAM, math accelerators
PDF  270 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H562II Datasheet(HTML) 57 Page - STMicroelectronics

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DS14258 Rev 5
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STM32H562xx and STM32H563xx
Functional overview
62
•
Configurable behavior at slave underrun condition (support of cascaded circular
buffers)
•
Wake-up from Stop capability
•
Optional status pin RDY signalizing the slave device ready to handle the data flow.
Three standard I2S interfaces (multiplexed with SPI1, SPI2 and SPI3) are available. They
can be operated in Master or Slave mode, in full-duplex communication modes, and can be
configured to operate with configurable resolution as input or output channel.
I2S main features:
•
Full duplex communication
•
Simplex communication (only transmitter or receiver)
•
Master or slave operations
•
8-bit programmable linear prescaler
•
Data length may be 16, 24 or 32 bits
•
Channel length can be 16 or 32 in master, any value in slave
•
Programmable clock polarity
•
Error flags signaling for improved reliability: Underrun, Overrun, and Frame Error
•
Embedded Rx and TxFIFOs
•
Supported I2S protocols:
–
I2S Philips standard
–
MSB-Justified standard (left-justified)
–
LSB-Justified standard (right-justified)
–
PCM standard (with short and long frame synchronization)
•
Data ordering programmable (LSb or MSb first)
•
DMA capability for transmission and reception
•
Master clock can be output to drive an external audio component. The ratio is fixed at
256 x FWS (where FWS is the audio sampling frequency)
3.39
Serial audio interface (SAI)
The devices embed two SAIs. Refer to Table 11 for the features implementation. The SAI
bus interface handles communications between the MCU and the serial audio protocol.
Table 10. SPI features
Feature
SPI1, SPI2, SPI3
(full feature set instances)
SPI4, SPI5, SPI6
(full feature set instances)
Data size
Configurable from 4- to 32-bit Configurable from 4- to 16-bit
CRC computation
CRC polynomial length
configurable from 5- to 33-bit
CRC polynomial length
configurable from 5- to 17-bit
Size of FIFOs
16x 8-bit
8x 8-bit
Number of transfered data
Up to 65535
I2S feature
Yes
No



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