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STM32H562II Datasheet(PDF) 60 Page - STMicroelectronics |
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STM32H562II Datasheet(HTML) 60 Page - STMicroelectronics |
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60 / 270 page  Functional overview STM32H562xx and STM32H563xx 60/270 DS14258 Rev 5 When SDMMC peripherals are used simultaneously: • Only one can be used in eMMC with 8-bit bus width. • Usage of SDMMC1 SDIO voltage switch use is mutually exclusive with SDMMC2 eMMC with 8-bit bus width. • If SDMMC1 must support SDIO UHS-I modes (SDR12, SDR25, SDR50, SDR104, or DDR50), SDMMC2 cannot support eMMC with 8-bit bus width. • If SDMMC2 must support eMMC with 8-bit bus width, SDMMC1 can only support SDIO Default mode and High-speed mode. 3.41 Controller area network (FDCAN) The controller area network (CAN) subsystem consists of one CAN module, a shared message RAM memory and a configuration block. The modules (FDCAN) are compliant with ISO 11898-1: 2015 (CAN protocol specification version 2.0 part A, B) and CAN FD protocol specification version 1.0. A 0.8-Kbyte message RAM implements filters, receives FIFOs, transmits event FIFOs and transmits FIFOs. The FDCAN main features are: • Conform with CAN protocol version 2.0 part A, B and ISO 11898-1: 2015, -4 • CAN FD with maximum 64 data bytes supported • CAN error logging • AUTOSAR and J1939 support • Improved acceptance filtering • Two receive FIFOs of three payloads each (up to 64 bytes per payload) • Separate signaling on reception of high priority messages • Configurable transmit FIFO / queue of three payload (up to 64 bytes per payload) • Configurable transmit Event FIFO • Programmable loop-back test mode • Maskable module interrupts • Two clock domains: APB bus interface and CAN core kernel clock • Power-down support 3.42 USB full speed (USB) USB main features: • USB specification version 2.0 full-speed compliant • Host and device functions • 2048 bytes of dedicated SRAM data buffer memory with 32-bit access • USB clock recovery • Configurable number of endpoints from 1 to 8 • Cyclic redundancy check (CRC) generation/checking, non-return-to-zero inverted (NRZI) encoding/decoding and bit-stuffing • Isochronous transfers support |
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