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STM32H562II Datasheet(PDF) 18 Page - STMicroelectronics |
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STM32H562II Datasheet(HTML) 18 Page - STMicroelectronics |
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18 / 270 page  Description STM32H562xx and STM32H563xx 18/270 DS14258 Rev 5 Figure 1. STM32H562xx and STM32H563xx block diagram Note: PC[15:13] are in the VBAT domain. VBAT USB FS NJTRST, JTDI, JTCK/SWCLK, JTMS/SWDIO, JTDO TRACECLK, TRACED[3:0] CLK, NE[4:1], NL, NBL[1:0], A[25:0], D[15:0], NOE, NWE, NWAIT, NCE, INT, SDCLK,SDCLKE[1:0], SDNE[1:0], SDNWE, NRAS, NCAS, as AF JTAG/ SW MPU ETM NVIC Arm Cortex-M33 250 MHz TrustZone FPU C-BUS S-BUS D[7:0], D[3:1]dir CMD, CMDdir,CK, CKin D0dir, D2dir SDMMC1 SDMMC2 GPDMA1 GPDMA2 GPIO port A GPIO port B GPIO port C GPIO port D GPIO port E GPIO port F GPIO port G GPIO port H GPIO port I EXT IT. WKP PA[15:0] PB[15:0] PC[15:0] PD[15:0] PE[15:0] PF[15:0] PG[15:0] PH[15:0] PI[7:0] 16 AF 20xIN VDDA ADC1 ITF 3 compl. channels (TIM1_CH[1:3]N), 6 channels (TIM1_CH[1:4]), ETR, BKIN, BKIN2 as AF TIM1/PWM 16-bit 3 compl. channels (TIM1_CH[1:3]N), 6 channels (TIM1_CH[1:4]), ETR, BKIN, BKIN2 as AF TIM8/PWM 16-bit 2 channels, 1 compl. channel, BKIN as AF TIM15 16-bit 1 channel, 1 compl. channel, BKIN as AF TIM16 16-bit 1 channel, 1 compl. channel, BKIN as AF TIM17 16-bit RX, TX, CK,CTS, RTS_DE as AF MOSI, MISO, SCK, NSS as AF SPI1/I2S1 smcard irDA USART1 MCLK_A, SD_A, FS_A, SCK_A, MCLK_B, SD_B, FS_B, SCK_B as AF MCLK_A, SD_A, FS_A, SCK_A, MCLK_B, SD_B, FS_B, SCK_B as AF SAI2 SAI1 AHB/APB2 AHB/APB1 FMAC CORDIC CRC AHB2 250 MHz SRAM3 (320 Kbytes) SRAM2 (64 Kbytes) SRAM1 (256 Kbytes) Flash memory (up to 2 Mbytes) OCTOSPI1 memory interface Flexible memory controller (FMC): SDRAM, SRAM, PSRAM, NOR flash, FRAM, NAND flash IO[7:0], CLK, NCLK, NCS. DQS as AF RNG HASH DP DM D[15:0], CK, CMD as AF DCMI/PSSI VDD Power management Voltage regulator LDO or SMPS 3.3 to 1.2 V VDD = 1.71 to 3.6 V VSS VDD VDD Supply supervision BOR VDDIO, VDDUSB, VDDA, VSSA, VDD, VSS, NRST Reset PVD, PVM Int VDD XTAL OSC 4- 50 MHz IWDG OSC_IN OSC_OUT Standby interface VDD HS64 CSI LSI PLL 1, 2, 3 Reset and clock control TIM2 32-bit TIM3 16-bit TIM4 16-bit TIM5 32-bit smcard irDA UART4 UART5 SPI2/I2S2 I2C1/SMBUS I2C2/SMBUS FDCAN2 USART2 smcard irDA USART3 4 channels, ETR as AF 4 channels, ETR as AF 4 channels, ETR as AF 4 channels, ETR as AF RX, TX, CK, CTS, RTS_DE as AF RX, TX, CK, CTS, RTS_DE as AF RX, TX, CTS, RTS_DE as AF RX, TX, CTS, RTS_DE as AF MOSI, MISO, SCK, NSS as AF SCL, SDA, SMBA as AF SCL, SDA, SMBA as AF TX, RX as AF WWDG CRS TIM6 16-bit TIM7 16-bit UCPD1 CC1, DBCC1, CC2, DBCC2, FRSCC1, FRSCC2 as AF LPTIM2 IN1, IN2, CH1, CH2, ETR as AF AHB/APB3 Temperature monitoring VBAT XTAL 32k RTC RTC_OUT1, RTC_OUT2, RTC_REFIN, RTC_TS TAMP RTC_OUT[8:1], RTC_IN[8:1] VDDA VREF buffer VREF+ LPTIM1 IN1, IN2, CH1, CH2, ETR as AF SBS I2C3/SMBUS SCL, SDA, SMBA as AF SPI5 MOSI, MISO, SCK, NSS as AF LPUART1 RX, TX, CTS, RTS_DE as AF VDDUSB BKPSRAM (4 Kbytes) AUDIOCLK as AF GTZC1 HSI48 WKUPx (x=1 to 8) SRAM 512 B MAC ETHERNET RAMCFG MOSI, MISO, SCK, NSS as AF SPI4 MOSI, MISO, SCK, NSS as AF SPI6 ADC2 VDDA DAC1 ITF DAC1_OUT1 DAC1_OUT2 I2C4/SMBUS SCL, SDA, SMBA as AF FDCAN1 TX, RX as AF EXTI LPTIM3 IN1, IN2, CH1, CH2, ETR as AF TIM12 16-bit TIM13 16-bit TIM14 16-bit 2 channels, ETR as AF 1 channel, ETR as AF 1 channel, ETR as AF UART7 UART8 RX, TX, CTS, RTS_DE as AF RX, TX, CTS, RTS_DE as AF UART9 RX, TX, CTS, RTS_DE as AF smcard irDA USART10 smcard irDA USART11 RX, TX, CK, CTS, RTS_DE as AF RX, TX, CK, CTS, RTS_DE as AF IWDG HDMI-CEC UART12 RX, TX, CTS, RTS_DE as AF smcard irDA USART6 RX, TX, CK, CTS, RTS_DE as AF SPI3/I2S3 MOSI, MISO, SCK, NSS as AF DTS LPTIM4 IN1, ETR as AF LPTIM5 IN1, IN2, CH1, CH2, ETR as AF LPTIM6 IN1, IN2, CH1, CH2, ETR as AF MSv67308V6 I3C1 SCL, SDA CEC VDD power domain VDDA power domain VDDUSB power domain VBAT power domain |
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