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STM32H562II Datasheet(PDF) 209 Page - STMicroelectronics |
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STM32H562II Datasheet(HTML) 209 Page - STMicroelectronics |
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209 / 270 page  DS14258 Rev 5 209/270 STM32H562xx and STM32H563xx Electrical characteristics 238 pad capacitance (refer to Table 58). A high Cparasitic value downgrades conversion accuracy. To remedy this, fADC should be reduced. 3. Refer to Table 58 for the value of Ilkg. 4. Refer to Figure 20. General PCB design guidelines It is recommended to perform power supply decoupling as shown in Figure 58 or Figure 59, depending on whether VREF+ is connected to VDDA or not. The 100 nF capacitors must be ceramic (good quality), and placed as close as possible to the chip. Figure 58. Power supply and reference decoupling (VREF+ not connected to VDDA) 1. VREF+ input is not available on all packages (refer to Table 14), VREF- is available only on UFBGA176+25, UFBGA169 with SMPS, LQFP100, UFBGA169, and UFBGA176+25 packages. When VREF+ is not available, it is internally connected to VSSA. MSv50648V2 1 μF // 100 nF 1 μF // 100 nF STM32 VREF+ (1) VSSA/VREF- (1) VDDA |
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