STM32H562II datasheet(159/270 Pages) STMICROELECTRONICS

159 / 270 page

DS14258 Rev 5

159/270

STM32H562xx and STM32H563xx

Electrical characteristics

238

5.3.13

Absolute maximum ratings (electrical sensitivity)

Based on three different tests (ESD, LU) using specific measurement methods, the device is

stressed to determine its performance in terms of electrical sensitivity.

Electrostatic discharge (ESD)

Electrostatic discharges (a positive pulse followed by a negative one) are applied to the pins

of each sample according to each pin combination. This test conforms to the

ANSI/ESDA/JEDEC JS-001 and ANSI/ESDA/JEDEC JS-002 standards.

Static latch-up

Two complementary static tests are required on six parts to assess the latch-up

performance:

•

A supply overvoltage is applied to each power supply pin

•

A current injection is applied to each input, output and configurable I/O pin

These tests are compliant with the JESD78 IC latch-up standard.

5.3.14

I/O current injection characteristics

As a general rule, avoid current injection to the I/O pins, due to external voltage below VSS

or above VDD (for standard, 3.3 V-capable I/O pins) during the normal product operation. To

give an indication of the device robustness when an abnormal injection accidentally

happens, susceptibility tests are performed on a sample basis during the characterization.

Functional susceptibility to I/O current injection

While a simple application is executed, the device is stressed by injecting current into the

I/O pins (one at the time) programmed in floating input mode, and checked for functional

failures. The failure is indicated by an out of range parameter: ADC error above a certain

Table 55. ESD absolute maximum ratings

Symbol

Ratings

Conditions

Packages

Class

Maximum

value(1)

Unit

VESD(HBM)

Electrostatic discharge

voltage (human body model)

TA = 25 °C, conforming to

ANSI/ESDA/JEDEC JS-001

Packages

with SMPS

1000(2)

Packages

without SMPS

22000

VESD(CDM)

Electrostatic discharge

voltage (charge device model)

TA = 25 °C, conforming to

ANSI/ESDA/JEDEC JS-002

All packages

C2a

500

1. Evaluated by characterization - Not tested in production.

2. The electrostatic discharge is 2000 V for all pins, except VFBSMPS, for which the test fails at 2000 V and passes at 1600 V.

Table 56. Electrical sensitivities

Symbol

Parameter

Conditions

Class

Static latch-up class

TJ = 130 °C, conforming to JESD78

II level A

STM32H562II Datasheet(PDF) 159 Page - STMicroelectronics

STM32H562II Datasheet(HTML) 159 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL