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STM32H562II Datasheet(PDF) 157 Page - STMicroelectronics |
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STM32H562II Datasheet(HTML) 157 Page - STMicroelectronics |
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157 / 270 page ![]() DS14258 Rev 5 157/270 STM32H562xx and STM32H563xx Electrical characteristics 238 5.3.12 EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Functional EMS (electromagnetic susceptibility) While a simple application is executed (toggling two LEDs through I/O ports), the device is stressed by two electromagnetic events until a failure occurs. The failure is indicated by the LEDs: • Electrostatic discharge (ESD), positive and negative, is applied to all device pins until a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard. • FTB: A burst of fast transient voltage (positive and negative) is applied to VDD and VSS through a 100 pF capacitor, until a functional disturbance occurs. This test is compliant with the IEC 61000-4-4 standard. A device reset allows to resume normal operation. The test results are given in Table 53. They are based on the EMS levels and classes defined in AN1709 “EMC design guide for STM8, STM32 and legacy MCUs”. As a consequence, it is recommended to add a serial resistor (1 kΩ), located as close as possible to the MCU, to the pins exposed to noise (connected to tracks longer than 50 mm on PCB). 1. Data are valid for program memory and high-cycling data memory. 2. Specified by design - Not tested in production. Table 52. Flash memory endurance and data retention Symbol Parameter Conditions Min(1) Unit NPEND Endurance program memory TJ = -40 to +130 °C 10 kcycles NDEND Endurance data memory TJ = -40 to +130 °C 100 tPRET Program memory, data retention 1 kcycle at TA = 125 °C 10 Years 1 kcycles at TA = 85 °C 30 10 kcycles at TA = 55 °C 30 tDRET Data retention for data memory 100 kcycle at TA = 125 °C 1 100 kcycles at TA = 85 °C 10 100 kcycles at TA = 55 °C 10 1. Evaluated by characterization - Not tested in production, unless otherwise specified. Table 53. EMS characteristics Symbol Parameter Conditions Level/Class VFESD Voltage limits to apply on any I/O pin to induce a functional disturbance VDD = 3.3 V, TA = 25 °C, LQFP176-SMPS, frcc_cpu_ck = 250 MHz, conform to IEC 61000-4-2 2B VFTB Fast transient voltage burst limits to apply through 100 pF on VDD and VSS pins to induce a functional disturbance 5A |
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