STM32H562II datasheet(203/270 Pages) STMICROELECTRONICS

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DS14258 Rev 5

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STM32H562xx and STM32H563xx

Electrical characteristics

238

5.3.23

12-bit ADC characteristics

Unless otherwise specified, the parameters given in Table 95 are derived from tests

performed under the ambient temperature, fHCLK frequency, and VDDA supply voltage

conditions summarized in Table 20.

Table 95. 12-bit ADC characteristics(1)(2)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDDA

Analog supply

voltage for

ADC ON

-1.62

3.6

VREF+

Positive

reference

voltage

1.62

VDDA

VREF-

Negative

reference

voltage

VSSA

fadc_ker_ck(3)

Clock

frequency

1.62 V ≤ VDDA ≤ 3.6 V

1.5

MHz

fS(4) with

RAIN = 47 Ω

and

CPCB = 22 pF

Sampling rate

for fast

channels

(VIN[0:5])

Resolution

= 12 bits

Continuous

mode

1.8V ≤ VDDA ≤ 3.6V

-40°C ≤ TJ ≤ 130°C

fadc_ker_ck

= 75 MHz

SMP

=2.5

-5.00-

MSPS

1.6V ≤ VDDA ≤ 3.6V

fadc_ker_ck

= 70 MHz

4.66

Single or

Discontinuous

mode

2.4V ≤ VDDA ≤ 3.6V

fadc_ker_ck

= 60 MHz

4.00

1.6V ≤ VDDA ≤ 3.6V

fadc_ker_ck

= 50 MHz

3.33

Resolution

= 10 bits

Continuous

mode

1.6V ≤ VDDA ≤ 3.6V

fadc_ker_ck

= 75 MHz

5.77

Single or

Discontinuous

mode

2.4V ≤ VDDA ≤ 3.6V

5.77

1.6V ≤ VDDA ≤ 3.6V

fadc_ker_ck

= 65 MHz

5.00

Resolution

= 8 bits

All modes

1.6V ≤ VDDA ≤ 3.6V

fadc_ker_ck

= 75 MHz

6.82

Resolution

= 6 bits

8.33

Sampling rate

for slow

channels

Resolution

= 12 bits

All modes(5)

1.6V ≤ VDDA ≤ 3.6V

fadc_ker_ck

= 35 MHz

2.30

Resolution

= 10 bits

2.70

Resolution

= 8 bits

fadc_ker_ck

= 50 MHz

4.50

Resolution

= 6 bits

fadc_ker_ck

= 50 MHz

5.50

tTRIG

External trigger

period

Resolution = 12 bits

1/fadc_ker_ck

VAIN(2)

Conversion

voltage range

VREF+

VCMIV

Common

mode input

voltage

VREF / 2

− 10%

VREF / 2

+ 10%

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