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STM32H562II Datasheet(PDF) 129 Page - STMicroelectronics |
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STM32H562II Datasheet(HTML) 129 Page - STMicroelectronics |
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129 / 270 page ![]() DS14258 Rev 5 129/270 STM32H562xx and STM32H563xx Electrical characteristics 238 5.3.2 VCAP external capacitor The stabilization for the embedded LDO regulator is achieved by connecting an external capacitor CEXT (whose value is specified in Table 22) to the VCAPx (one or two pins, depending upon the package). Two external capacitors must be connected to VCAP pins (refer to AN5711 “STM32H5 Series hardware development”). Figure 22. External capacitor CEXT ftim_ker_ck TIM[1:8], TIM[12:17] 250 200 150 100 MHz TIM6/17 6464 6464 frng_clk RNG 5050 5050 fsai_a_ker_ck SAI1/2 250 200 150 100 fsai_b_ker_ck fspi_ker_ck SPI(I2S)1,2,3 125 100 75 50 SPI4,5,6 125 100 75 50 flpuart_ker_ck LPUART1 250 200 150 100 fusart_ker_ck USART/UART 250 200 150 100 fusb_ker_ck USB FS 50 50 50 50 fadc_ker_ck_input ADC 250 200 150 100 fadc_ker_ck(3) ADC 125 100 75 50 fdac_ker_ck DAC 250 200 150 100 fucpd_ker_ck USBPD 64 64 64 64 frtc_ker_ck RTC 1 1 1 1 - DCMI 250 200 150 100 1. Specified by design - Not tested in production. 2. The maximum kernel clock frequencies can be limited by the maximum peripheral clock frequency (refer to each peripheral electrical characteristics). 3. This maximum kernel clock frequency does not consider the maximum ADC clock frequency (refer to Table 95). Table 21. Maximum allowed clock frequencies (continued) Symbol(1)(2) Parameter VOS0 VOS1 VOS2 VOS3 Unit MS19044V2 ESR R Leak C |
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