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T89C51RD2-RDTIL Datasheet(PDF) 45 Page - ATMEL Corporation |
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T89C51RD2-RDTIL Datasheet(HTML) 45 Page - ATMEL Corporation |
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45 / 104 page ![]() 45 T89C51RD2 4243G–8051–05/03 Figure 19. Power-down Exit Waveform Exit from Power-down by reset redefines all the SFRs, exit from Power-down by exter- nal interrupt does no affect the SFRs. Exit from Power-down by either reset or external interrupt does not affect the internal RAM content. Note: If idle mode is activated with Power-down mode (IDL and PD bits set), the exit sequence is unchanged, when execution is vectored to interrupt, PD and IDL bits are cleared and idle mode is not entered. Table 27 shows the state of ports during idle and power-down modes. Port 0 can force a 0 level. A "one" will leave port floating. INT1 INT0 XTALA Power-down Phase Oscillator Restart Phase Active Phase Active Phase or XTALB Table 27. State of Ports Mode Program Memory ALE PSEN PORT0 PORT1 PORT2 PORT3 Idle Internal 1 1 Port Data (1) Port Data Port Data Port Data Idle External 1 1 Floating Port Data Address Port Data Power Down Internal 0 0 Port Data (1) Port Data Port Data Port Data Power Down External 0 0 Floating Port Data Port Data Port Data |
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