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STM32H562II Datasheet(PDF) 189 Page - STMicroelectronics

Part # STM32H562II
Description  Arm® Cortex®-M33 32-bit MCU TrustZone® FPU, 375 DMIPS, 250 MHz, 2-Mbyte flash, 640-Kbyte RAM, math accelerators
PDF  270 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H562II Datasheet(HTML) 189 Page - STMicroelectronics

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DS14258 Rev 5
189/270
STM32H562xx and STM32H563xx
Electrical characteristics
238
NAND controller waveforms and timings
Figures 41 through 44 represent synchronous waveforms, tables 82 and 83 provide the
corresponding timings. The results are obtained with the following FMC configuration and a
capacitive load (CL) of 30 pF:
•
COM.FMC_SetupTime = 0x01
•
COM.FMC_WaitSetupTime = 0x03
•
COM.FMC_HoldSetupTime = 0x02
•
COM.FMC_HiZSetupTime = 0x01
•
ATT.FMC_SetupTime = 0x01
•
ATT.FMC_WaitSetupTime = 0x03
•
ATT.FMC_HoldSetupTime = 0x02
•
ATT.FMC_HiZSetupTime = 0x01
•
Bank = FMC_Bank_NAND
•
MemoryDataWidth = FMC_MemoryDataWidth_16b
•
ECC = FMC_ECC_Enable
•
ECCPageSize = FMC_ECCPageSize_512Bytes
•
TCLRSetupTime = 0
•
TARSetupTime = 0
•
Capacitive load CL = 30 pF
In all timing tables, Tfmc_ker_ck is the HCLK clock period.
Figure 41. NAND controller waveforms for read access
1. y = 7 or 15, depending upon the NAND flash memory interface.
1. Evaluated by characterization - Not tested in production.
MSv73150V1
FMC_NWE
FMC_NOE (NRE)
FMC_D[y:0]
tw(NOE)
tsu(D-NOE)
th(NOE-D)
ALE (FMC_A17)
CLE (FMC_A16)
FMC_NCEx
td(ALE-NOE)
th(NOE-ALE)



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