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STM32H562II Datasheet(PDF) 175 Page - STMicroelectronics |
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STM32H562II Datasheet(HTML) 175 Page - STMicroelectronics |
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175 / 270 page  DS14258 Rev 5 175/270 STM32H562xx and STM32H563xx Electrical characteristics 238 Figure 32. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 58, otherwise the reset is not taken into account by the device. 5.3.17 Extended interrupt and event controller input (EXTI) characteristics The pulse on the interrupt input must have a minimal length to ensure its detection by the event controller. 5.3.18 FMC characteristics Unless otherwise specified, the parameters given in tables 70 to 83 are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage conditions summarized in Table 20, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Measurement points are done at CMOS levels: 0.5 VDD • I/O compensation cell activated • HSLV activated when VDD ≤ 2.7 V • VOS level set to VOS0 Table 68. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit RPU(2) Weak pull-up equivalent resistor(1) 1. The pull-up is designed with a true resistance in series with a switchable PMOS. The PMOS contribution to the series resistance is minimum (~10 % order) . VIN = VSS 30 40 50 kΩ VF(NRST)(2) 2. Specified by design - Not tested in production. NRST input filtered pulse 1.71 V < VDD < 3.6 V - - 50 ns VNF(NRST)(2) NRST input not filtered pulse 1.71 V < VDD < 3.6 V 350 - - ai14132d STM32 RPU NRST(2) VDD Filter Internal Reset 0.1 μF External reset circuit (1) Table 69. EXTI input characteristics(1) 1. Specified by design - Not tested in production. Symbol Parameter Conditions Min Typ Max Unit PLEC Pulse length to event controller - 20 - - ns |
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