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Z8F021ASH020SC Datasheet(PDF) 52 Page - Zilog, Inc. |
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Z8F021ASH020SC Datasheet(HTML) 52 Page - Zilog, Inc. |
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52 / 276 page ![]() PS022815-0206 General-Purpose I/O Z8 Encore! XP® 4K Series Product Specification 33 Architecture Figure 7 illustrates a simplified block diagram of a GPIO port pin. In this figure, the abil- ity to accommodate alternate functions and variable port current drive strength is not illus- trated. Figure 7.GPIO Port Pin Block Diagram GPIO Alternate Functions Many of the GPIO port pins can be used for general-purpose I/O and access to on-chip peripheral functions such as the timers and serial communication devices. The Port A–D Alternate Function sub-registers configure these pins for either General-Purpose I/O or alternate function operation. When a pin is configured for alternate function, control of the port pin direction (input/output) is passed from the Port A–D Data Direction registers to the alternate function assigned to this pin. Table 15 on page 36 lists the alternate functions possible with each port pin. For those pins with more one alternate function, the alternate function is defined through Alternate Function Sets sub-registers AFS1 and AFS2. The crystal oscillator functionality is not controlled by the GPIO block. When the crystal oscillator is enabled in the oscillator control block, the GPIO functionality of PA0 and PA1 is overridden. In that case, those pins function as input and output for the crystal oscillator. D Q DQ D Q GND VDD Port Output Control Port Data Direction Port Output Data Register Port Input Data Register Port Pin DATA Bus System Clock System Clock Schmitt Trigger |
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