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Z8F021ASH020SC Datasheet(PDF) 48 Page - Zilog, Inc. |
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Z8F021ASH020SC Datasheet(HTML) 48 Page - Zilog, Inc. |
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48 / 276 page ![]() PS022815-0206 Low-Power Modes Z8 Encore! XP® 4K Series Product Specification 29 Low-Power Modes Overview The Z8 Encore! XP® 4K Series products contain power-saving features. The highest level of power reduction is provided by the STOP mode. The next lower level of power reduc- tion is provided by the HALT mode. Further power savings can be implemented by disabling individual peripheral blocks while in Active mode (defined as being in neither STOP nor HALT mode). STOP Mode Executing the eZ8 CPU’s STOP instruction places the device into STOP mode. In STOP mode, the operating characteristics are: • Primary crystal oscillator and internal precision oscillator are stopped; XIN and XOUT (if previously enabled) are disabled, and PA0/PA1 revert to the states programmed by the GPIO registers. • System clock is stopped. • eZ8 CPU is stopped. • Program counter (PC) stops incrementing. • Watch-Dog Timer’s internal RC oscillator continues to operate if enabled by the Oscillator Control Register. • If enabled, the Watch-Dog Timer logic continues to operate. • If enabled for operation in STOP mode by the associated Flash Option Bit, the Voltage- Brown Out protection circuit continues to operate. • Low-power operational amplifier continues to operate if enabled by the Power Control Register to do so. • All other on-chip peripherals are idle. To minimize current in STOP mode, all GPIO pins that are configured as digital inputs must be driven to one of the supply rails (VCC or GND). Additionally, any GPIOs config- ured as outputs should also be driven to one of the supply rails. The device can be brought out of STOP mode using STOP Mode Recovery. For more information about STOP Mode Recovery refer to Reset, STOP Mode Recovery and Low Voltage Detection on page 20. |
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