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Z8F021ASH020SC Datasheet(PDF) 85 Page - Zilog, Inc.

Part # Z8F021ASH020SC
Description  Z8 Encore XP-R 4K Series High-Performance 8-Bit Microcontrollers
PDF  276 Pages
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z8F021ASH020SC Datasheet(HTML) 85 Page - Zilog, Inc.

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PS022815-0206
Timers
Z8 Encore! XP® 4K Series
Product Specification
66
–
Select either the rising edge or falling edge of the Timer Input signal for the count.
This selection also sets the initial logic level (High or Low) for the Timer Output
alternate function. However, the Timer Output function is not required to be
enabled.
2. Write to the Timer High and Low Byte registers to set the starting count value. This
only affects the first pass in COUNTER mode. After the first timer Reload in
COUNTER mode, counting always begins at the reset value of 0001H. In COUNTER
mode the Timer High and Low Byte registers must be written with the value 0001H.
3. Write to the Timer Reload High and Low Byte registers to set the Reload value.
4. If appropriate, enable the timer interrupt and set the timer interrupt priority by writing
to the relevant interrupt registers.
5. Configure the associated GPIO port pin for the Timer Input alternate function.
6. If using the Timer Output function, configure the associated GPIO port pin for the
Timer Output alternate function.
7. Write to the Timer Control register to enable the timer.
In COUNTER mode, the number of Timer Input transitions since the timer start is given
by the following equation:
COMPARATOR COUNTER Mode
In COMPARATOR COUNTER mode, the timer counts input transitions from the analog
comparator output. The TPOL bit in the Timer Control Register selects whether the count
occurs on the rising edge or the falling edge of the comparator output signal. In COMPAR-
ATOR COUNTER mode, the prescaler is disabled.
The frequency of the comparator output signal must not exceed one-fourth the system
clock frequency. Further, the high or low state of the comparator output signal pulse
must be no less than twice the system clock period. A shorter pulse may not be captured.
After reaching the Reload value stored in the Timer Reload High and Low Byte registers,
the timer generates an interrupt, the count value in the Timer High and Low Byte registers
is reset to 0001H and counting resumes. Also, if the Timer Output alternate function is
enabled, the Timer Output pin changes state (from Low to High or from High to Low) at
timer Reload.
The steps for configuring a timer for COMPARATOR COUNTER mode and initiating the
count are as follows:
1. Write to the Timer Control register to:
–
Disable the timer
Counter Mode Timer Input Transitions
Current Count Value Start Value
–
=
Caution:



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