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DFE252012F-R47M Datasheet(PDF) 10 Page - Analog Devices |
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DFE252012F-R47M Datasheet(HTML) 10 Page - Analog Devices |
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10 / 122 page  Electrical Characteristics—Top-Level (continued) (VSYS = VINx = 12V, VOUT1 = 0.8V (M1_RNG = 0x0), VOUT2 = 1.1V (M2_RNG = 0x1), VOUT3 = 1.8V (M3_RNG = 0x1), VOUT4 = 3.3V (M4_RNG = 0x2), single-phase configuration, VCE = 1.8V, VIO = 1.8V, TA = TJ = -40°C to +125°C, typical values are at TA = TJ = +25°C, unless otherwise noted. Note 2. ) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS THERMAL PROTECTION Thermal Warning TWARN TJ rising, 15°C hysteresis TWARN_TH[2:0] = 0x0 +95 °C TWARN_TH[2:0] = 0x1 +100 TWARN_TH[2:0] = 0x2 +105 TWARN_TH[2:0] = 0x3 +110 TWARN_TH[2:0] = 0x4 +115 TWARN_TH[2:0] = 0x5 (default) +120 TWARN_TH[2:0] = 0x6 +125 TWARN_TH[2:0] = 0x7 +130 Thermal Shutdown (TSHDN) TSHDN TJ rising, 15°C hysteresis +165 °C FLEXIBLE POWER SEQUENCER (FPS) Sequence Start Delay tDLY_SEQ Delay from rising edge of FPS_EN signal to VOUTx ramping start-off in the 1st time slot VLx is enabled 100 μs Time Slot Delay Step tDLY_STEP DLY_STEP[1:0] = 0x0 0.5 ms DLY_STEP[1:0] = 0x1 1.0 DLY_STEP[1:0] = 0x2 2.0 DLY_STEP[1:0] = 0x3 4.0 Time Slot Accuracy fOSC_ACC Root oscillator accuracy -5 +5 % LOGIC INPUT AND OUTPUT CE Input Logic High Threshold VIH_CE CE_PD_EN = 0 1.1 V CE_PD_EN = 1 1.5 CE Input Logic Low Threshold VIL_CE 0.4 V IRQB Output Logic Low Threshold VOL_IRQB Sinking 2mA 0.2 V CE Pull-Down Current IPD_CE CE_PD_EN = 1 1.1V ≤ VCE ≤ 16V 0.5 1.7 4.0 μA VCE ≤ 0.4V 100 200 nA CE Leakage Current ILKG_CE VSYS = 16V, VCE = 0V and 16V, CE_PD_EN = 0 TJ = +25°C ±0.1 μA TJ = +85°C (Note 5) ±0.5 MAX77542 16VIN/16A, Quad-Phase High-Efficiency Buck Converter www.analog.com Analog Devices | 10 |
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