DFE252012F-R47M datasheet(31/122 Pages) AD

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Detailed Description—Top-Level

Chip Enable (CE) and Internal Bias Supplies

The MAX77542 has dedicated internal supplies which are the VDD, the VL12, and the VL34. The VDD provides power for

internal logic and control while the VL12 and the VL34 provide power to gate drivers for switching MOSFETs. These three

regulators are powered from the SYS (or the ALT_IN if applicable) input.

When the VSYS supply is valid, a logic high on the CE pin turns on the internal bias circuitry including the VDD regulator.

As soon as the VDD supply becomes stable, the MAX77542 reads the RCFGx and the RSELx values for configuring the

device and enters standby mode. It takes typically 430µs from pulling the CE pin high. In standby mode, the I2C serial

interface is activated so that a host processor can overwrite all user-accessible registers including default output voltage,

startup delay setting, and output enable control for each regulator.

The VL12 supply is turned on when either Buck1 or Buck2 is enabled. When Buck3 or Buck4 is enabled, the VL34 supply

automatically is turned on. To reduce the turn-on delay time, the VL12 and the VL34 supplies can be turned on by setting

the VL_EN bit to 1 through I2C even when the corresponding buck outputs are disabled. In case both the CE and a MFIO

(when EN_Mx function is selected) pins are pulled high at the same time, the buck outputs require even longer time to

startup because the internal bias circuitry needs to be turned on first before propagating the buck enable signals.

When the CE pin is pulled low, the MAX77542 goes into shutdown mode and turns off all the regulators regardless of the

Mx_EN bits and the EN_Mx (MFIOx) pins. This event also resets all registers to their POR default values.

Table 1. VDD and I2C Enable Truth Table

CE PIN

VDD AND I2C SERIAL INTERFACE

Low

Disabled

High

Enabled

Alternative Low-Voltage Input (ALT_IN)

When an alternative power source (VALT_IN) is available between the VSWO and the VSYS, it may optionally be used

to power the dedicated internal linear regulator (VDD, VL12, and VL34) to improve the efficiency. As shown in Figure

1, the switchover circuit dynamically selects the input of the VDD and the VL12 & VL34 supplies between the SYS and

the ALT_IN pins as needed to maintain steady operation. When the device exits shutdown mode (CE = 1), the linear

regulator is initially powered from the SYS pin and it can be switched over to the ALT_IN pin if a valid power source

is connected to the ALT_IN. The ALT_IN_I interrupt and the ALT_SWO status bits indicate the status of the switchover

circuit.

MAX77542

16VIN/16A, Quad-Phase High-Efficiency Buck

Converter

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DFE252012F-R47M Datasheet(PDF) 31 Page - Analog Devices