DFE252012F-R47M datasheet(39/122 Pages) AD

39 / 122 page

Detailed Description—Quad-Phase Configurable Buck Converter

The MAX77542 is a high-efficiency, phase-configurable buck converter with four 4A phases (Φ). A differential pair of

output-voltage sensing input (SNSxP and SNSxN) ensures best-in-class output-voltage regulation at the point of load.

Each buck converter operates on an input supply between 2.8V and 16V. The output voltages are preset using the

SELx inputs and further configurable with an I2C serial interface between 0.3V and 5.2V in 5mV, 10mV, or 20mV steps

depending on the Mx_RNG[1:0] bits. See the Output-Voltage Setting section.

Each switching phase supports 4A and a four-phase (4Φ) configuration supports up to 16A. The phase configuration is

user-programmable by tying the SEL2, the SEL3 and/or the SEL4 pins to the AGND on the PCB. See the Phase and

Output Configuration section.

Buck Converter Control Scheme

The MAX77542 uses an adaptive constant on-time (COT) current-mode control scheme. The adaptive COT control

provides fast response to load transients, inherent compensation to input-voltage variation, and stable performance at

low-duty cycles. As shown in Figure 4, Buck1 is referenced in the following explanation.

VL12

PGND1

LX1

BST1

IN1

IPLIM1

RCOMP

PHASE2/3/4

PLL FSW

STABILIZER

SNS1P

IVLIM1, IZX

SOFT-START/-STOP

RAMP-UP/-DOWN

ON-TIME GENERATOR1

SPREAD-

SPECTRUM

DRIVER

LOGIC

REGISTERS AND

CONTROL

FAULT PROTECTION

STATE MACHINE

VPOK, VSCP

DIE TEMP

MONITOR

90°/120°/180°

STAGGERED PHASE

CLK GENERATOR

POK_M1

VL LDO

VDD

PHASE CONFIGURATION

DECODER

SEL3

PLL FSW

STABILIZER

I2C SERIAL

INTERFACE

SDA

SCL

CLKDET_M1

EN_M1

INTERNAL

CLK

EXTERNAL

CLK DETECT

CCOMP

VL12

AGND

SEL4

SEL2

SNS1N

VDD LDO

AGND

VIO

POR AND

UVLO

REFDAC (VOUT1)

AGND

PWM

FPWM_M1

ALT_IN

VSWO

SWITCHOVER

SYS

Figure 4. Functional Block Diagram

An on-time (MOSFET Q1 is on) is controlled by an on-time generator circuit which calculates an on-time based on the

input voltage (VIN1), the output voltage (VOUT1), and the target switching frequency (FSW1). An off-time (MOSFET Q2 is

on) begins when the on-time ends. During the dead-time, the inductor current conducts through the intrinsic body diode.

A PWM comparator regulates the VOUT1 by modulating off-time. The positive input of the PWM comparator is a voltage

proportional to the actual output voltage error. The negative input is a voltage proportional to the inductor current sensed

through the MOSFET Q2. The PWM comparator begins an on-time when the error voltage becomes higher than the

current-sense signal. The off-time automatically begins again when the calculated on-time expires. A phase-locked loop

(PLL) stabilizes the switching frequency and controls phase spacing. The PLL stabilizes slave phases 90°, 120°, or 180°

apart from the master phase when the output is configured for multiphase operations. In multiphase configurations, all

MAX77542

16VIN/16A, Quad-Phase High-Efficiency Buck

Converter

www.analog.com

Analog Devices | 39

DFE252012F-R47M Datasheet(PDF) 39 Page - Analog Devices

DFE252012F-R47M Datasheet(HTML) 39 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL