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DFE252012F-R47M Datasheet(PDF) 38 Page - Analog Devices |
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DFE252012F-R47M Datasheet(HTML) 38 Page - Analog Devices |
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38 / 122 page ![]() (goes high) when all interrupt bits have been cleared. If an interrupt is captured during the read sequence, the IRQB output is held low. When the IRQB output is pulled low by an unmasked interrupt event, the IRQB output stays low until the interrupt bit is cleared by the reading operation of the host processor or the corresponding interrupt mask bit is set to 1 (masked). All interrupts (except UVLO_I) are masked by default. Masked interrupt bits do not cause the IRQB pin to assert. The MAX77542 has two interrupt mask modes. With MASK_MODE = 0 (default), an interrupt bit sets for an interrupt event regardless of the corresponding mask bit, however the interrupt event does not propagate to the interrupt source register when masked. When the MASK_MODE is set to 1, it prevents the interrupt register bit from asserting for the corresponding interrupt event (gated at the interrupt bit). In addition to interrupt bits, the MAX77542 has read-only status bits. These bits always represent the current status of the device. It is highly recommended that the host processor read status bits whenever the MAX77542 is initialized by the host processor. These status bits do not directly affect the state of interrupt bits. Register Reset Conditions All registers (both Type O and Type F) are reset to the POR default values specified in the Register Map section when the CE pin is pulled low or the VSYS supply drops below its POR threshold (typ 1.7V). Whenever the CE pin is pulled high, the MAX77542 updates the default register values based on RCFGx and RSELx detection, and the updated default values are latched until the CE pin is pulled low or a POR event occurs. A UVLO or a TSHDN event resets all buck output-voltage setting registers (Type F) to their default values, while a SCP event only resets buck output-voltage setting registers (Type F) for the corresponding output. Factory Options The MAX77542 is factory-configurable with a variety of one-time programmable (OTP) options. See Table 4 for a selector guide. Contact Analog Devices to request a variant of the device with specialized OTP options. Table 4. MAX77542 Factory-Programmed Defaults (OTP Options) MAX77542A SELx OPTIONS VOUT1 (V) 0.8 VOUT2 (V) 1.1 VOUT3 (V) 1.8 VOUT4 (V) 3.3 CFG1 OPTIONS MFIO1 FPSI MFIO2 POK_M1 MFIO3 FPWM_M1 MFIO4 CLKDET_M1 MFIO5 VB_GLB MFIO6 RSTINB MFIO7 TWARNB MFIO8 RSTOB CFG2 OPTIONS M1_ILIM (A) 5.5 M2_ILIM (A) 5.5 M3_ILIM (A) 5.5 M4_ILIM (A) 5.5 Mx_FREQ (MHz) 1.0 MAX77542 16VIN/16A, Quad-Phase High-Efficiency Buck Converter www.analog.com Analog Devices | 38 |
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