DFE252012F-R47M datasheet(45/122 Pages) AD

45 / 122 page

Table 8. Default VOUT2/3/4 Selection (continued)

RSEL2/3/4 (Ω)

TARGET VOUT2/3/4 (V)

VOUT2/3/4 RANGE

64.9k

3.3

High

75.0k

3.4

High

86.6k

3.8

High

100k

5.0

High

≥ 115k

Factory Option

Output-Voltage Setting

The output voltages (VOUTx) are adjustable between 0.3V and 5.2V in 5mV, 10mV, or 20mV steps depending on the

Mx_RNG[1:0] bits as shown in Table 9. In each output-voltage range, the lowest code (0x00) of the output-voltage setting

registers represents the minimum output voltage and the target output voltage is increased by one LSB step as the code

increases. The Mx_VOUT_M[7:0] registers digitally limit the maximum programmable output voltages in each range even

if the code increases beyond that point.

Each master phase has three output-voltage control registers. The Mx_VOUT_H[7:0] register is used for normal

operation when the VSEL function and VB functions are not used (VSEL_Mx and VB_Mx signals are considered logic

high). When the VSEL or VB function of the MFIOx is selected, the Mx_VOUT_L[7:0] or the Mx_VOUT_B[7:0] register

controls the output voltage depending on the logic inputs. See the Output-Voltage Selection (VSEL) and Boot (Default)

Output-Voltage Selection (VB) sections for more information.

The default values of the Mx_VOUT_H[7:0], the Mx_VOUT_L[7:0], the Mx_VOUT_B[7:0], and the Mx_RNG[1:0] registers

are set by the corresponding RSELx values. See the Default Output-Voltage Selection (SELx) section for more

information.

For output voltages that have overlapping ranges (e.g., 1V), select the desired range by trading off the load transient

response and the required effective output capacitance. Using the 1V output example: use low range for a slightly better

load transient response, or mid range for a slightly worse transient response but with less effective output capacitance

requirement. See the Output-Capacitor Selection for more information on the required effective output capacitance for

the different output-voltage ranges.

Table 9. Buck Output-Voltage Range

Mx_RNG[1:0]

VOUT PROGRAMMING RANGE

STEP PER LSB

0x0 (Low range)

0.3V to 1.3V

5mV

0x1 (Mid range)

0.6V to 2.6V

10mV

0x2 (High range)

1.2V to 5.2V

20mV

Note that the Mx_RNG[1:0] bits are latched by RSELx detection and are protected from unauthorized access. In case the

output-voltage range needs to be changed during operation, contact sales representatives.

Soft-Start and Soft-Stop

The bucks always soft-start whenever they are enabled (regardless of the EN_Mx (MFIOx) or I2C command) or when

recovering from a fault condition. When the individual buck is disabled by the EN_Mx (MFIOx) or I2C command, the buck

always initiates soft-stop. When a POK fault time-out or a SCP event occurs to a buck output, only the corresponding

buck stops switching immediately (LX node becomes high impedance) without affecting the operation of the other buck

outputs. In case a UVLO or a TSHDN fault happens, all buck outputs stop switching immediately.

Each buck has internal ramps that control the slew rate of output-voltage changes during soft-start and soft-stop. The

soft-start and the soft-stop slew rates are set individually by the Mx_SSTRT_SR[2:0] and the Mx_SSTOP_SR[2:0] bits,

respectively. During soft-start and soft-stop, the bucks automatically enter FPWM mode regardless of operating mode

settings when the Mx_FSREN bits are set to 1 (default). To support "Pre-biased" startup (startup without discharging pre-

existing voltage at the output), the Mx_FSREN and the Mx_ADIS100 bits need to be set to 0 before the buck is enabled.

The Mx_SSTRT_SR[2:0] and the Mx_SSTOP_SR[2:0] bits set the slew rates of a voltage reference to an error amplifier.

When the fastest slew-rate option is selected, the actual output-voltage slew rate might be slower than the target

MAX77542

16VIN/16A, Quad-Phase High-Efficiency Buck

Converter

www.analog.com

Analog Devices | 45

DFE252012F-R47M Datasheet(PDF) 45 Page - Analog Devices

DFE252012F-R47M Datasheet(HTML) 45 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL