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DFE252012F-R47M Datasheet(PDF) 29 Page - Analog Devices |
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DFE252012F-R47M Datasheet(HTML) 29 Page - Analog Devices |
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29 / 122 page  Pin Description (continued) PIN NAME FUNCTION TYPE F1, F2 PGND1 Phase1 Power Ground Power Ground A1, A2 PGND2 Phase2 Power Ground Power Ground A9, A10 PGND3 Phase3 Power Ground Power Ground F9, F10 PGND4 Phase4 Power Ground Power Ground E5 SNS1N Phase1 Negative Differential Output-Voltage Sensing Input Analog Input E4 SNS1P Phase1 Positive Differential Output-Voltage Sensing Input Analog Input B4 SNS2P Phase2 Positive Differential Output-Voltage Sensing Input. Connect to AGND or leave unconnected (floating) when Phase2 becomes a slave phase of a multiphase converter. Analog Input B6 SNS3N Phase3 Negative Differential Output-Voltage Sensing Input. Connect to AGND or leave unconnected (floating) when Phase3 becomes a slave phase of a multiphase converter. Analog Input B7 SNS3P Phase3 Positive Differential Output-Voltage Sensing Input. Connect to AGND or leave unconnected (floating) when Phase3 becomes a slave phase of a multiphase converter. Analog Input E7 SNS4P Phase4 Positive Differential Output-Voltage Sensing Input. Connect to AGND or leave unconnected (floating) when Phase4 becomes a slave phase of a multiphase converter. Analog Input INTERNAL BIAS SUPPLY C6, F6 AGND Analog (Quiet) Ground Ground D6 ALT_IN Alternative Power Input for VDD, VL12, and VL34. Bypass to AGND with a 2.2μF ceramic capacitor when used. See the Alternative Low-Voltage Input (ALT_IN) section for more information. Power Input E6 SYS System Power Input (Supply to Internal VDD, VL12, and VL34 Linear Regulators). Bypass to AGND with a 2.2μF ceramic capacitor. Power Input F5 VDD Internal Bias Supply Output. Powered from SYS. Bypass to AGND with a 1μF ceramic capacitor. Do not load this pin externally. Power Output F4 VL12 Internal Gate Driver Supply Output for Phase1 and Phase2. Powered from SYS. Bypass VL12 to PGND with a 2.2μF ceramic capacitor. Do not load this pin externally. Power Output F7 VL34 Internal Gate Driver Supply Output for Phase3 and Phase4. Powered from SYS. Bypass VL34 to PGND with a 2.2μF ceramic capacitor. Do not load this pin externally. Power Output A6 VIO I/O Supply Input. Bypass to AGND with a 1µF ceramic capacitor. Power Input CONTROL AND SERIAL INTERFACE A7 CE Chip Enable Input (Active-High). Enables VDD, VL12, and VL34 regulators and I2C serial interface. See the Chip Enable (CE) and Internal Bias Supplies section for more information. Digital Input C5 CFG1 Device Configuration1 Selection Input. Connect a selection resistor (RCFG1) between CFG1 and AGND to configure the I2C slave address and the default MFIO functions. Default settings can be overwritten through I2C. See the Device Configuration (CFGx) section for more information. Analog Input MAX77542 16VIN/16A, Quad-Phase High-Efficiency Buck Converter www.analog.com Analog Devices | 29 |
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