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COUNTER VALUE

COUNTER CLOCK PERIOD (1/FCOUNT)

FCOUNT = FSS_MOD × [2N+1 - 2].

N = COUNTER RESOLUTION (4 BITS).

FSS_MOD = MODULATION RATE (1, 3, 5, OR 7kHz).

ΔFSS = MODULATION ENVELOPE (±8%, ±12%, OR ±16%).

FSW(NOM)

FSW(NOM) + ΔFSS

FSW(NOM) - ΔFSS

REPEAT PERIOD (1/FSS_MOD)

FSW

Figure 11. 4-Bit Triangular Modulation Signal Example

Inductor Current Limits

The MAX77542 has a cycle-by-cycle current limit feature that prevents the inductor current (in each phase) from

increasing beyond the IPLIM. If an on-time is ended by the peak current limit, the buck prevents a new on-time from

starting until the inductor current falls below the valley current limit (IVLIM) which is typically set 1A less than the IPLIM.

This prevents the inductor current from increasing uncontrollably due to the overloaded output. In case the on-time

determined by the given operating condition is less than 130ns (typ), the next on-time pulse is not triggered until the

inductor current hits the IVLIM. Each buck has four PLIM thresholds which are individually set with the Mx_ILIM[1:0] bits.

See the Register Map section for more details. The programmable PLIM thresholds allow an optimal circuit protection

and inductor selections for the given operating conditions and load requirements.

Power-OK (POK)

The MAX77542 features power-OK (POK) comparators to monitor the quality of each buck output. The Mx_POK status

bits continuously reflect the status of these monitors. The Mx_POK bit goes high if the corresponding buck output voltage

rises above the VPOK_R (typ 82% of the VOUT target) when soft-start is completed. When the corresponding buck output

falls below the VPOK_F (typ 78% of the VOUT target), the Mx_POK bit goes low. When unmasked, the Mx_POKFLT_I

interrupt sets whenever the Mx_POK status bit changes from 1 to 0. The Mx_POKFLT_I bits are individually maskable.

See the Register Map section for more details.

The quality of the buck output can be directly monitored using the POK function of the MFIOx pins. See the Power-OK

(POK) Output section for more information.

Fault Protection

The MAX77542 has a fault-protection scheme designed to protect itself from abnormal conditions. Each individual buck

has its own fault state machine (shown in Figure 12) which is independently triggered by a short-circuit protection (SCP),

a thermal shutdown (TSHDN), and/or an undervoltage lock-out (UVLO) event. The operation of the state machine is

summarized as follows:

MAX77542

16VIN/16A, Quad-Phase High-Efficiency Buck

Converter

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DFE252012F-R47M Datasheet(PDF) 50 Page - Analog Devices