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STM32MP251C Datasheet(PDF) 4 Page - STMicroelectronics |
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STM32MP251C Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 241 page ![]() • 2× SysTick Cortex®-M33 timer (secure, non-secure) • 1× SysTick Cortex®-M0+ timer • 7× watchdogs (5× independent and 2× window) Hardware acceleration • AES-128, -192, -256, DES/TDES • Secure AES-256 with SCA • RSA, ECC, ECDSA with SCA • HASH (SHA-1, SHA-224, SHA-256, SHA3), HMAC • True random number generator • CRC calculation unit • “On-the-fly” DDR encryption/decryption (AES-128) • “On-the-fly” OTFDEC Octo-SPI flash memory decryption (AES-128) Debug mode • Arm® CoreSight™ trace and debug: SWD and JTAG interfaces 12288-bit fuses including 96-bit unique ID All packages are ECOPACK2 compliant STM32MP251C/F STM32MP253C/F STM32MP255C/F STM32MP257C/F DS14284 - Rev 3 page 4/241 |
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