STM32MP251C datasheet(33/241 Pages) STMICROELECTRONICS

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Horizontal and vertical mirror

•

Color lookup-table, color keying, gamma, and dithering on output

LTDC parallel interface:

•

Provides a 24-bit parallel digital RGB, and delivers all signals to interface directly to a broad range of LCD

and TFT panels.

•

Up to 150 Mpixel/s, which correspond up to FHD (1920 × 1080) @60 fps resolution with HDMI blankings

•

Output pixel formats: RGB888, RGB666, RGB565, YUV422-16 bits

LTDC DSI interface:

•

The LTDC provide pixels to the display serial interface (DSI).

LTDC LVDS interface:

•

The LTDC provide pixels to the LVDS display interface (LVDS).

3.38

Display serial interface (DSI)

Note:

Features may be limited or absent in some devices or packages (see Section 2: Description for details).

The DSI is part of a group of communication protocols defined by the MIPI Alliance. The MIPI DSI host controller

is a digital core that implements all protocol functions defined in the MIPI DSI specification.

It provides an interface between the system and the MIPI D-PHY that allows the communication with a DSI-

compliant display.

•

Compliant with MIPI Alliance standards

•

Interface with MIPI D-PHY

•

Supports all commands defined in the MIPI Alliance specification for DCS

•

Bidirectional communication and escape mode support through data lane 0

•

Supports non-continuous clock in D-PHY clock lane for additional power saving

•

Supports ultra-low-power mode with PLL disabled

•

ECC and checksum capabilities

•

Support for end of transmission packet (EoTp)

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Fault recovery schemes

•

Configurable selection of system interfaces:

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AMBA APB for control and optional support for generic and DCS commands

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Video mode interface through LTDC

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Adapted command mode interface through LTDC

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Independently programmable virtual channel ID in video mode, adapted command mode and APB

slave

•

Video mode interfaces features:

–

LTDC interface color coding mappings into 16, 18 and 24-bit interface

–

Programmable polarity of all LTDC interface signals

•

Adapted interface features:

–

Support for sending large amounts of data through the memory_write_start (WMS) and

memory_write_continue (WMC) DCS commands

–

LTDC interface color coding mappings into 16, 18 and 24-bit interface

•

Video mode pattern generator

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Up to 4 × data lanes, up to 2.5 Gbps each

•

Up to QXGA (2048 × 1536) @60 fps

3.39

LVDS display interface (LVDS)

Note:

Features may be limited or absent in some devices or packages (see Section 2 for details).

The LVDS supports the following high-level features:

STM32MP251C/F STM32MP253C/F STM32MP255C/F STM32MP257C/F

Functional overview

DS14284 - Rev 3

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