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STM32MP251C Datasheet(PDF) 34 Page - STMicroelectronics |
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STM32MP251C Datasheet(HTML) 34 Page - STMicroelectronics |
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34 / 241 page ![]() • FPD-Link-I and OpenLDI (v0.95) protocols • Single-link or dual-link operation • Single-display or double-display (with the same content duplicated on both) • Flexible bit-mapping, including JEIDA and VESA • RGB888 or RGB666 output • Up to 2 links of 4 data lanes, up to 1.1 Gbit/s per lane – FPD bitrate: 784 Mbit/s per lane (112 Mpixel/s per link, 224 Mpixel/s if dual Link) – OpenLDI bitrate: 1100 Mbit/s per lane (157 Mpixel/s per link, 314 Mpixel/s if dual link) • Up to QXGA (2048 × 1536) @60 fps with dual link • Up to WSXGA+ (1680 × 1050) @60 fps with single FPD link (1080p60 supported with OpenLDI) 3.40 Video encoder (VENC) Note: Features may be limited or absent in some devices or packages (see Section 2 for details). • Video encode – H264 (MPEG4_Part10/AVC, baseline/main/high up to 5.2), VP8 – Up to 1080p60 for H264/VP8 (performance shared with the VDEC) • Still-image encode – JPEG (baseline interleaved) – Up to 500 Mpixel/s for JPEG (performance shared with the VDEC) • VDERAM – 128 Kbytes – Hardware handshake between VENC and VDEC – Can be statically assigned to CPU as additional system RAM by SYSCFG setting 3.41 Video decoder (VDEC) Note: Features may be limited or absent in some devices or packages (see Section 2 for details). • Video decode – H264 (MPEG4_Part10/AVC, baseline/main/high up to 5.2), VP8 – Up to 1080p60 for H264/VP8 (performance shared with the VENC) • Still-image decode – JPEG (baseline interleaved). – Up to 500 Mpixel/s for JPEG (performance shared with the VENC) • VDERAM – 128 Kbytes – Hardware handshake between VENC and VDEC – Can be statically assigned to CPU as additional system RAM by SYSCFG setting 3.42 True random number generator (RNG ) All devices embed an RNG that deliver s 32-bit random numbers generated by an integrated analog circuit. 3.43 Hash processor (HASH) The HASH is a fully compliant implementation of the secure hash algorithm (SHA-1, SHA-2 family, SHA-3 family), and the HMAC (keyed-hash message authentication code) algorithm. The HMAC is suitable for applications that require a message authentication. The HASH computes FIPS (federal information processing Standards) approved digests of 160-, 224-, 256-, 384-, and 512-bit length, for messages of any length: • less than 264 bits (for SHA-1, SHA-224, and SHA-256) • less than 2128 bits (for SHA-384, SHA-512) STM32MP251C/F STM32MP253C/F STM32MP255C/F STM32MP257C/F Functional overview DS14284 - Rev 3 page 34/241 |
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