PIIX datasheet(75/122 Pages) INTEL

75 / 122 page

82371FB (PIIX) AND 82371SB (PIIX3)

2.5.4.

X-BUS, COPROCESSOR, and RESET REGISTERS

2.5.4.1.

Reset X-Bus IRQ12 And IRQ1 Register

I/O Address:

60h

Default Value:

N/A

Attribute:

Read only

This register clears the mouse interrupt function and the keyboard interrupt (IRQ1). Reads to this address are

monitored by the PIIX. When the mouse interrupt function is enabled (X-Bus Chip Select Register), the

mouse interrupt function is provided on the IRQ12/M input signal. In this mode, a mouse interrupt generates

an interrupt through IRQ12 to the Host CPU. A read of 60h releases IRQ12. Reads/writes flow through to the

ISA Bus.

Bit

Description

7:0

Reset IRQ12 and IRQ1. No specific pattern. A read of address 60h executes the command.

2.5.4.2.

Coprocessor Error Register

I/O Address:

F0h

Default Value:

N/A

Attribute:

Write only

Writing to this register causes the PIIX/PIIX3 to assert IGNNE#. The PIIX/PIIX3 also negates IRQ13 (internal

to the PIIX). Note, that IGNNE# is not asserted unless FERR# is active. Reads/writes flow through to the ISA

Bus.

Bit

Description

7:0

No special pattern required. A write to address F0h executes the command.

2.5.4.3.

RC—Reset Control Register

I/O Address:

CF9h

Default Value:

00h

Attribute:

Read/Write

Bits 1 and 2 in this register are used by the PIIX/PIIX3 to generate a hard reset or a soft reset. Bit 2 should be

cleared when writing the reset type (defined by bit 1) and then bit 2 should be set to initiate the reset. The 0 to

1 transition on bit 2 initiates the reset. For example, to initiate a soft reset via the CF9 Reset Control Register,

write 00h then 04h, then read the CF9 register.

Bit

Description

7:3

Reserved

Reset CPU (RCPU). This bit is used to initiate (transitions from 0 to 1) a hard reset (bit 1 in this

CPURST, PCIRST#, and RSTDRV. The PIIX/PIIX3 initiates a hard reset when this register is

programmed for a hard reset or PWROK is asserted. This bit cannot be read as a 1.

PIIX Datasheet(PDF) 75 Page - Intel Corporation

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