PIIX datasheet(72/122 Pages) INTEL

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82371FB (PIIX) AND 82371SB (PIIX3)

2.5.3.6.

OCW1—Operational Control Word 1 Register

I/O Address:

INT CNTRL-1—021h; INT CNTRL-2—0A1h

Default Value:

00h

Attribute:

Read/Write

OCW1 sets and clears the mask bits in the Interrupt Mask Register (IMR). Each interrupt request line may be

selectively masked or unmasked any time after initialization. The IMR stores the interrupt line mask bits. The

IMR operates on the IRR. Masking of a higher priority input does not affect the interrupt request lines of lower

priority. Unlike status reads of the ISR and IRR, for reading the IMR, no OCW3 is needed. The output data

bus contains the IMR when an I/O read is active and the I/O address is 021h or 0A1h (OCW1). All writes to

OCW1 must occur following the ICW1-ICW4 initialization sequence, since the same I/O ports are used for

OCW1, ICW2, ICW3 and ICW4.

Bit

Description

7:0

Interrupt Request Mask (Mask [7:0]). When a 1 is written to any bit in this register, the

corresponding IRQx line is masked. For example, if bit 4 is set to a 1, then IRQ4 is masked.

Interrupt requests on IRQ4 do not set channel 4's interrupt request register (IRR) bit as long is

the channel is masked. When a 0 is written to any bit in this register, the corresponding IRQx

is unmasked. Note that masking IRQ2 on CNTRL-1 also masks the interrupt requests from

CNTRL-2, which is physically cascaded to IRQ2.

2.5.3.7.

OCW2—Operational Control Word 2 Register

I/O Address:

INT CNTRL-1—020h; INT CNTRL-2—0A0h

Default Value:

Bit[4:0]=undefined; Bit[7:5]=001

Attribute:

Write Only

OCW2 controls both the Rotate Mode and the End of Interrupt Mode. Following a CPURST or ICW

initialization, the controller enters the fully nested mode of operation. Both rotation mode and specific EOI

mode are disabled following initialization.

Bit

Description

7:5

Rotate and EOI Codes. R, SL, EOI - These three bits control the Rotate and End of Interrupt

modes and combinations of the two. A chart of these combinations is listed above under the bit

definition.

Bits[7:5] Function Bits[7:5] Function

001

Non-specific EOI Cmd

000

Rotate in Auto EOI Mode (Clear)

011

Specific EOI Cmd

111

*Rotate on Specific EOI Cmd

101

Rotate on Non-Specific EOI Cmd

110

*Set Priority Cmd

100

Rotate in Auto EOI Mode (Set)

010

No Operation

* L0 - L2 Are Used

4:3

OCW2 Select. Must be programmed to 00 selecting OCW2.

PIIX Datasheet(PDF) 72 Page - Intel Corporation

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