NPIZ datasheet(21/24 Pages) ENPIRION

21 / 24 page

06489

April 16, 2012

Rev: C

EN6360QI

Enpirion Confidential

www.enpirion.com, Page 21

Layout Recommendation

Figure 10: Top Layout with Critical Components Only

(Top View). See Figure 9 for corresponding schematic.

This layout only shows the critical components and

top layer traces for minimum footprint in single-

supply mode with ENABLE tied to AVIN. Alternate

circuit configurations & other low-power pins need

to be connected and routed according to customer

application.

Please

see

the

Gerber

files

www.enpirion.com for details on all layers.

Recommendation 1:

Input and output filter

capacitors should be placed on the same side of

the PCB, and as close to the EN6360QI package

as possible. They should be connected to the

device with very short and wide traces. Do not use

thermal reliefs or spokes when connecting the

capacitor pads to the respective nodes. The +V and

GND traces between the capacitors and the

EN6360QI should be as close to each other as

possible so that the gap between the two nodes is

minimized, even under the capacitors.

Recommendation 2:

The PGND connections for

the input and output capacitors on layer 1 need to

have a slit between them in order to provide some

separation between input and output current loops.

Recommendation 3:

The system ground plane

should be the first layer immediately below the

surface layer. This ground plane should be

continuous and un-interrupted below the converter

and the input/output capacitors.

Recommendation 4

: The thermal pad underneath

the component must be connected to the system

ground plane through as many vias as possible.

The drill diameter of the vias should be 0.33mm,

and the vias must have at least 1 oz. copper plating

on the inside wall, making the finished hole size

around 0.20-0.26mm. Do not use thermal reliefs or

spokes to connect the vias to the ground plane.

This

connection

provides

the

path

for

heat

dissipation from the converter.

Recommendation 5

: Multiple small vias (the same

size

the

thermal

vias

discussed

recommendation 4) should be used to connect

ground terminal of the input capacitor and output

capacitors to the system ground plane. It is

preferred to put these vias along the edge of the

GND copper closest to the +V copper. These vias

connect the input/output filter capacitors to the

GND plane, and help reduce parasitic inductances

in the input and output current loops.

Recommendation 6

: AVIN is the power supply for

the small-signal control circuits. It should be

connected to the input voltage at a quiet point. In

Figure 10 this connection is made at the input

capacitor.

Recommendation 7

: The layer 1 metal under the

device must not be more than shown in Figure 10.

Refer to the section regarding Exposed Metal on

Bottom of Package. As with any switch-mode

DC/DC converter, try not to run sensitive signal or

control lines underneath the converter package on

other layers.

Recommendation 8:

The VOUT sense point should

be just after the last output filter capacitor. Keep the

sense trace short in order to avoid noise coupling

into the node.

Recommendation 9

: Keep RA, CA, RB, and R1

close to the VFB pin (Refer to Figure 10). The VFB

pin is a high-impedance, sensitive node. Keep the

trace to this pin as short as possible. Whenever

possible, connect RB directly to the AGND pin

instead of going through the GND plane.

Recommendation

all

the

layout

recommendations as close as possible to optimize

performance. Enpirion provides schematic and

layout reviews for all customer designs. Please

contact local Sales Representatives for references

to Enpirion Applications Engineering support.

NPIZ Datasheet(PDF) 21 Page - Enpirion, Inc.

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