R8CSLASH29 datasheet(282/471 Pages) RENESAS

282 / 471 page

R8C/28 Group, R8C/29 Group

16. Clock Synchronous Serial Interface

Rev.2.10

Sep 26, 2008

Page 265 of 441

REJ09B0279-0210

16.2.5

Clock Synchronous Communication Mode

16.2.5.1

Initialization in Clock Synchronous Communication Mode

Figure 16.12 shows the Initialization in Clock Synchronous Communication Mode. To initialize, set the TE bit

in the SSER register to 0 (transmit disabled) and the RE bit to 0 (receive disabled) before data transmission or

reception.

Set the TE bit to 0 and the RE bit to 0 before changing the communication mode or format.

Setting the RE bit to 0 does not change the contents of flags RDRF and ORER or the contents of the SSRDR

Figure 16.12

Initialization in Clock Synchronous Communication Mode

Start

SSMR2 register

SSUMS bit

← 0

SSCRH register

Set bits CKS0 to CKS2

Set RSSTP bit

SSSR register

ORER bit

← 0(1)

SSER register

RE bit

← 1 (receive)

TE bit

← 1 (transmit)

Set bits RIE, TEIE, and TIE

End

NOTE:

1. Write 0 after reading 1 to set the ORER bit to 0.

SSER register

RE bit

← 0

TE bit

← 0

SSMR2 register

SCKS bit

← 1

Set SOOS bit

SSCRH register

Set MSS bit

SSMR register

CPHS bit

← 0

CPOS bit

← 0

Set MLS bit

R8C/29 Datasheet(PDF) 282 Page - Renesas Technology Corp

R8C/29 Datasheet(HTML) 282 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL