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R8C/29 Datasheet(PDF) 284 Page - Renesas Technology Corp |
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R8C/29 Datasheet(HTML) 284 Page - Renesas Technology Corp |
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284 / 471 page ![]() R8C/28 Group, R8C/29 Group 16. Clock Synchronous Serial Interface Rev.2.10 Sep 26, 2008 Page 267 of 441 REJ09B0279-0210 Figure 16.14 Sample Flowchart of Data Transmission (Clock Synchronous Communication Mode) Start Initialization Read TDRE bit in SSSR register SSSR register TEND bit ← 0(1) End TDRE = 1 ? Write transmit data to SSTDR register Data transmission continues? Read TEND bit in SSSR register TEND = 1 ? No Yes Yes No No Yes SSER register TE bit ← 0 (1) (2) (3) (1) After reading the SSSR register and confirming that the TDRE bit is set to 1, write the transmit data to the SSTDR register. When the transmit data is written to the SSTDR register, the TDRE bit is automatically set to 0. (2) Determine whether data transmission continues. (3) When data transmission is completed, the TEND bit is set to 1. Set the TEND bit to 0 and the TE bit to 0 and complete transmit mode. NOTE: 1. Write 0 after reading 1 to set the TEND bit to 0. |
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