R8CSLASH29 datasheet(253/471 Pages) RENESAS

253 / 471 page

R8C/28 Group, R8C/29 Group

15. Serial Interface

Rev.2.10

Sep 26, 2008

Page 236 of 441

REJ09B0279-0210

Figure 15.6

Registers U0C1 to U1C1

UARTi Transmit/Receive Control Register 1 (i = 0 or 1)

Symbol

Address

After Reset

U0C1

00A5h

00000010b

U1C1

00ADh

00000010b

Bit Symbol

Bit Name

Function

NOTES:

Nothing is assigned. If necessary, set to 0.

When read, the content is 0.

Transmit enable bit(1)

0 : Disables transmission

1 : Enables transmission

Transmit buffer empty flag

0 : Disables reception

1 : Enables reception

UiIRS

b3 b2 b1

—

Receive enable bit

b7 b6 b5 b4

0 : Data in UiTB register

1 : No data in UiTB register

Receive complete flag(1)

0 : No data in UiRB register

1 : Data in UiRB register

Set the UiRRM bit to 0 (disables continuous receive mode) in UART mode.

UARTi transmit interrupt cause

select bit

0 : Transmission buffer empty (TI=1)

1 : Transmission completed (TXEPT=1)

UiRRM

UARTi continuous receive mode

enable bit(2)

0 : Disables continuous receive mode

1 : Enables continuous receive mode

The RI bit is set to 0 w hen the higher byte of the UiRB register is read out.

—

(b7-b6)

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