R8CSLASH29 datasheet(225/471 Pages) RENESAS

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R8C/28 Group, R8C/29 Group

14. Timers

Rev.2.10

Sep 26, 2008

Page 208 of 441

REJ09B0279-0210

j = A, B, or C

Table 14.22

Specifications of PWM2 Mode

Item

Specification

Count source

f1, f2, f4, f8, f32, fOCO40M, or external signal (rising edge) input to TRCCLK pin

Count operation

Increment TRC register

PWM waveform

PWM period: 1/fk × (m + 1) (no TRCTRG input)

Active level width: 1/fk × (n - p)

Wait time from count start or trigger: 1/fk × (p + 1)

fk: Count source frequency

m: TRCGRA register setting value

n: TRCGRB register setting value

p: TRCGRC register setting value

Count start conditions

• Bits TCEG1 to TCEG0 in the TRCCR2 register are set to 00b (TRCTRG trigger

disabled) or the CSEL bit in the TRCCR2 register is set to 0 (count continues).

1 (count starts) is written to the TSTART bit in the TRCMR register.

• Bits TCEG1 to TCEG0 in the TRCCR2 register are set to 01b, 10b, or 11b

(TRCTRG trigger enabled) and the TSTART bit in the TRCMR register is set to 1

(count starts).

A trigger is input to the TRCTRG pin

Count stop conditions

• 0 (count stops) is written to the TSTART bit in the TRCMR register while the CSEL

bit in the TRCCR2 register is set to 0 or 1.

The TRCIOB pin outputs the initial level in accordance with the value of the TOB

bit in the TRCCR1 register. The TRC register retains the value before count stops.

• The count stops due to a compare match with TRCGRA while the CSEL bit in the

TRCCR2 register is set to 1

The TRCIOB pin outputs the initial level. The TRC register retains the value before

count stops if the CCLR bit in the TRCCR1 register is set to 0. The TRC register is

set to 0000h if the CCLR bit in the TRCCR1 register is set to 1.

Interrupt request

generation timing

• Compare match (contents of TRC and TRCGRj registers match)

• The TRC register overflows

TRCIOA/TRCTRG pin

function

Programmable I/O port or TRCTRG input

TRCIOB pin function

PWM output

TRCIOC and TRCIOD

pin functions

Programmable I/O port

INT0 pin function

Programmable I/O port, pulse output forced cutoff signal input, or INT0 interrupt

input

Read from timer

The count value can be read by reading the TRC register.

Write to timer

The TRC register can be written to.

Select functions

• External trigger and valid edge selected

The edge or edges of the signal input to the TRCTRG pin can be used as the

PWM output trigger: rising edge, falling edge, or both rising and falling edges

• Buffer operation (Refer to 14.3.3.2 Buffer Operation.)

• Pulse output forced cutoff signal input (Refer to 14.3.3.4 Forced Cutoff of Pulse

Output.)

• Digital filter (Refer to 14.3.3.3 Digital Filter.)

m+1

TRCTRG input

TRCIOB output

(TRCTRG: Rising edge, active level is “H”)

n-p

n+1

p+1

n+1

n-p

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