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R8C/29 Datasheet(PDF) 140 Page - Renesas Technology Corp |
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R8C/29 Datasheet(HTML) 140 Page - Renesas Technology Corp |
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140 / 471 page  R8C/28 Group, R8C/29 Group 12. Interrupts Rev.2.10 Sep 26, 2008 Page 123 of 441 REJ09B0279-0210 Figure 12.18 Registers AIER and RMAD0 to RMAD1 Address Match Interrupt Enable Register Symbol Address After Reset AIER 0013h 00h Bit Symbol Bit Name Function RW — (b7-b2) — Nothing is assigned. If necessary, set to 0. When read, the content is 0. b7 b6 b5 b4 0 : Disable 1 : Enable RW b3 b2 b1 b0 Address match interrupt 0 enable bit 0 : Disable 1 : Enable RW AIER1 Address match interrupt 1 enable bit AIER0 Address Match Interrupt Register i (i = 0 or 1) b0 Symbol Address After Reset RMAD0 0012h-0010h 000000h RMAD1 0016h-0014h 000000h Setting Range RW (b23) b7 — — (b7-b4) Nothing is assigned. If necessary, set to 0. When read, the content is 0. Address setting register for address match interrupt 00000h to FFFFFh Function RW (b19) b3 (b15) b7 (b8) b0 b7 (b16) b0 |
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