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AS7150 Datasheet(PDF) 153 Page - ams-OSRAM AG |
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AS7150 Datasheet(HTML) 153 Page - ams-OSRAM AG |
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153 / 159 page ![]() AS7150 Register description Datasheet • PUBLIC • Document Feedback DS001130 • v3-00 • 2026-Jan-26 153 / 159 / 8.17.7 STATUS (Address 0xFA) The STATUS register shows the current status of the interface. When released via IRQ_ENABLE, all bits can trigger an interrupt. Reading the STATUS registers only deletes irq_iir_overflow, irq_fifooverflow_and irq_sequencer. To delete irq_prox, the STATUS_PROX register must be read. To delete irq_vcsel, the STATUS_VCSEL register must be read. To delete irq_asat, the STATUS_ASAT register must be read. To delete irq_lowvds, the STATUS_LED register must be read. To delete irq_sequencer, the STATUS_SEQ register must be read. The interrupt for the fill level of the FIFO irq_fifothreshold cannot be deleted directly, but only by lowering the FIFO level. Table 154: STATUS register Addr: 0xFA STATUS Bit Bit name Default Access Bit description 7 irq_prox 0 RO This is the proximity interrupt status register. Please read the STATUS_PROX register for detailed information about the proximity state. 6 irq_vcsel 0 RO This is the VCSEL interrupt status register. Please read the STATUS_VCSEL register to get information about the root cause of the interrupt which can be a short circuit on one of the LED inputs or an on time violation. 5 irq_asat 0 RO This is the ADC modulator analog saturation interrupt register. Please check the STATUS_ASAT register to find out which of the modulators ran into saturation. 4 irq_led_lowvds 0 RO This is the LED driver input low voltage detection interrupt register. Please read STATUS_LED register in order to find out which LED input has run into an undervoltage condition. 3 irq_fifooverflow 0 RO This is the FIFO overflow interrupt register. Once this bit is set a FIFO overflow event occurred and ADC sampling data got lost. 2 irq_fifothreshold 0 RO This is the FIFO threshold interrupt register. This interrupt is released one the FIFO level is above the FIFO level defined in FIFO_THRESHOLD register. 0 irq_sequencer 0 RO This is the sequencer interrupt register. Please read out the STATUS_SEQ register to find out the root cause of the interrupt. |
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