AS7150 datasheet(126/159 Pages) AMSOSRAM

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AS7150

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8.11.6

SEQ2_SINC_CFGC register (Address 0x66)

Table 95: SEQ2_SINC_CFGC register

Addr: 0x66

SEQ2_SINC_CFGC

Bit

Bit name

Default

Access

Bit description

7:0

seq2_start_delay

R/W

This register controls the start delay after the

ADC modulator reset is released and

modulator data is supplied to the SINC down

sampling filter block. Please refer to

Figure 26 which shows the tSD timing related

to this register for sequencer 2.

0: No oversampling delay

1: 1µs start delay

2: 2µs start delay

…

255: 255µs start delay

8.12

AOC

All registers in this chapter are ambient light compensation current control registers for both

sequencers, modulators and subsamples. The LSB current value for each register is

calculated by the defined offset DAC full scale range divided by 255. Both DACs support a

wide full-scale range starting with 1µA full scale range going up to 128µA full scale range

which is controlled via 3-bit registers mod1_ios_fs and mod2_ios_fs for both ADC modulator

inputs.

8.12.1

AOC_MOD1_SEQ1_SUB1 register (Address 0x70)

Table 96: AOC_MOD1_SEQ1_SUB1 register

Addr: 0x70

AOC_MOD1_SEQ1_SUB1

Bit

Bit name

Default

Access

Bit description

7:0

aoc_mod1_seq1_sub1

R/W

This is the ambient light compensation offset

current control register for subsample 1 in

sequencer 1 for ADC modulator 1. If any of

these registers is set to 0 no offset current is

applied to is appendant ADC modulator.

AS7150 Datasheet(PDF) 126 Page - ams-OSRAM AG

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