AS7150 datasheet(122/159 Pages) AMSOSRAM

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AS7150

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DS001130 • v3-00 • 2026-Jan-26

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8.11.2

SEQ1_SINC_CFGB register (Address 0x62)

Table 91: SEQ1_SINC_CFGB register

Addr: 0x62

SEQ1_SINC_CFGB

Bit

Bit name

Default

Access

Bit description

6:3

seq1_os_delay

R/W

In case embedded oversampling filter

function is enabled this register allows to

configure a delay before data from the SINC

down sampler is used for the oversampling

calculation for sequencer 1. Please refer

also to Figure 26 which shows the tOS timing

related to this register.

000: No oversampling delay

001: 1µs delay

010: 2µs delay

…

111: 7µs delay

seq1_sel_order

R/W

This register controls the filter order of

sequencer one down sampling SINC filter.

Please refer to Figure 17 which provides an

overview of the signal processing flow

including the filter order selection block.

0: 4th order down sampling filter enabled

1: 5th order down sampling filter enabled

seq1_filter_mode

R/W

This register bit controls the filter operation

mode of sequencer one down sampling filter.

Default filter operation mode is a CIC filter

which can be reconfigured to integrator filter

mode by setting seq1_filter_mode bit.

0: Integrator filter operation mode

1: CIC filter operation mode

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