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STM32L4P5CE Datasheet(PDF) 157 Page - STMicroelectronics |
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STM32L4P5CE Datasheet(HTML) 157 Page - STMicroelectronics |
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157 / 311 page  IDD (Run) Supply current in Run mode fHCLK=fHSE up to 48 MHZ included, bypass mode PLL ON above 48 MHz all peripherals disable VDD12=1.20V fHCLK= 120 MHz Reduced code 7.02 6.42 mA 58 53 µA/MHz Coremark 7.82 8.02 65 67 Dhrystone2.1 8.02 8.22 67 69 Fibonacci 7.82 8.42 65 70 While(1) 6.62 6.62 55 55 1. All values are obtained by calculation based on measurements done without SMPS and using following parameters: SMPS input = 3.3 V, SMPS efficiency = 85%. Table 36. Typical current consumption in Run and Low-power run modes, with different codes running from Flash, ART enable (Cache ON Prefetch OFF) and power supplied by external SMPS (continued) Symbol Parameter Conditions(1) TYP Single Bank Mode TYP Dual Bank Mode Unit TYP Single Bank Mode TYP Dual Bank Mode Unit - VDD12 fHCLK Code 25°C 25°C 25°C 25°C |
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