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STM32L4P5CE Datasheet(PDF) 53 Page - STMicroelectronics

Part # STM32L4P5CE
Description  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 150 DMIPS, up to 1-MB Flash memory, 320-KB SRAM, LCD-TFT, ext. SMPS
PDF  311 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L4P5CE Datasheet(HTML) 53 Page - STMicroelectronics

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DS12903 Rev 2
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STM32L4P5xx
Functional overview
64
3.30
Random number generator (RNG)
All devices embed an RNG that delivers 32-bit random numbers generated by an integrated
analog circuit.
3.31
Parallel synchronous slave interface (PSSI)
The PSSI is a generic synchronous 8-/16-bit parallel data input/output slave interface. It
allows the transmitter to send a data valid signal to indicate when the data is valid, and the
receiver to output a flow control signal to indicate when it is ready to sample the data.
The PSSI main features are:
•
The PSSI shares most of the circuitry with the digital camera interface (DCMI). It thus
cannot be used simultaneously with the DCMI.
•
Slave mode operation
•
8- or 16-bit parallel data input or output
•
4-word (16-byte) FIFO
•
Data enable (DE) alternate function input and Ready (RDY) alternate function output.
When enabled, these signals can either allow the transmitter to indicate when the data
is valid or the receiver to indicate when it is ready to sample the data, or both.
3.32
HASH hardware accelerator (HASH)
The hash processor is a fully compliant implementation of the secure hash algorithm (SHA-
1, SHA-224, SHA-256), the MD5 (message-digest algorithm 5) hash algorithm and the
HMAC (keyed-hash message authentication code) algorithm suitable for a variety of
applications.
It computes a message digest (160 bits for the SHA-1 algorithm, 256 bits for the SHA-256
algorithm and 224 bits for the SHA-224 algorithm,128 bits for the MD5 algorithm) for
messages of up to (264 - 1) bits, while the HMAC algorithms provide a way of authenticating
messages by means of hash functions. The HMAC algorithms consist in calling the SHA-1,
SHA-224, SHA-256 or MD5 hash function twice.
3.33
Timers and watchdogs
The devices include two advanced control timers, up to nine general-purpose timers, two
basic timers, two low-power timers, two watchdog timers and a SysTick timer.
Table 10 below compares the features of the advanced control, general-purpose and basic
timers.



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