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STM32L4P5CE Datasheet(PDF) 28 Page - STMicroelectronics |
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STM32L4P5CE Datasheet(HTML) 28 Page - STMicroelectronics |
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28 / 311 page ![]() Functional overview STM32L4P5xx 28/311 DS12903 Rev 2 3.7.4 Low-power modes The ultra-low-power devices support seven low-power modes to achieve the best compromise between low-power consumption, short startup time, available peripherals and available wake-up sources. The table below shows the related STM32L4P5xx modes overview. Table 4. STM32L4P5xx modes overview Mode Regulator(1) CPU Flash SRAM Clocks DMA and peripherals(2) Wakeup source Run Range 1 Yes ON(3) ON Any All N/A SMPS range 2 High Range 2 All except OTG_FS, RNG, LCD-TFT SMPS range 2 Low LPRun LPR Yes ON(3) ON Any except PLL All except OTG_FS, RNG, LCD-TFT N/A Sleep Range 1 No ON(3) ON(4) Any All Any interrupt or event SMPS range 2 High Range 2 All except OTG_FS, RNG, LCD-TFT SMPS range 2 Low LPSleep LPR No ON(3) ON(4) Any except PLL All except OTG_FS, RNG, LCD-TFT Any interrupt or event Stop 0(5) Range 1 No Off ON LSE LSI BOR, PVD, PVM RTC, IWDG COMPx (x=1,2) DAC1 OPAMPx (x=1,2) USARTx (x=1...5)(6) LPUART1(6) I2Cx (x=1...4)(7) LPTIMx (x=1,2) *** All other peripherals are frozen Reset pin, all I/Os BOR, PVD, PVM RTC, IWDG COMPx (x=1..2) USARTx (x=1...5)(6) LPUART1(6) I2Cx (x=1...4)(7) LPTIMx (x=1,2) OTG_FS(8) Range 2 |
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