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STM32L4P5CE Datasheet(PDF) 25 Page - STMicroelectronics |
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STM32L4P5CE Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 311 page ![]() DS12903 Rev 2 25/311 STM32L4P5xx Functional overview 64 Figure 3. STM32L4P5xxxP with external SMPS power supply overview During power-up and power-down phases, the following power sequence requirements must be respected: • When VDD is below 1 V, other power supplies (VDDA, VDDIO2 and VDDUSB) must remain below VDD +300 mV. • When VDD is above 1 V, all power supplies are independent. • During the power-down phase, VDD can temporarily become lower than other supplies only if the energy provided to the MCU remains below 1 mJ; this allows external decoupling capacitors to be discharged with different time constants during the power- down transient phase. MSv49333V1 VDDA domain Backup domain Standby circuitry (Wakeup logic, IWDG) Voltage regulator Low voltage detector LSE crystal 32 K osc BKP registers RCC BDCR register RTC I/O ring VCORE domain Temp. sensor Reset block 3 x PLL, HSI, MSI Flash memory USB transceivers VDDUSB VDDIO2 VDDIO1 I/O ring PG[15:2] VDDIO2 VDDA VSSA VSS VSS VDDIO2 domain VDD domain VCORE VSS VDD VBAT Core SRAM1 SRAM2 SRAM3 Digital peripherals 2 x D/A converters 1 x A/D converter 2 x comparators 2 x operational amplifiers Voltage reference buffer 2x VDD12 |
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