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STM32L4P5CE Datasheet(PDF) 155 Page - STMicroelectronics |
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STM32L4P5CE Datasheet(HTML) 155 Page - STMicroelectronics |
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155 / 311 page ![]() Table 35. Typical current consumption in Run and Low-power run modes, with different codes running from Flash, ART enable (Cache ON Prefetch OFF) Symbol Parameter Conditions Code TYP Single Bank Mode TYP Dual Bank Mode Unit TYP Single Bank Mode TYP Dual Bank Mode Unit - Voltage scaling 25°C 25°C 25°C 25°C IDD (Run) Supply current in Run mode fHCLK=fHSE up to 48 MHZ included, bypass mode PLL ON above 48 MHz all peripherals disable Range2 fHCLK=26MHz Reduced code(1) 3.15 3.30 mA 121 127 µA/MHz Coremark 3.40 3.50 131 135 Dhrystone2.1 3.80 3.70 146 142 Fibonacci 3.45 3.65 133 140 While(1) 2.90 2.90 112 112 Range 1 Normal Mode fHCLK= 80 MHz Reduced code(1) 11.00 11.50 mA 138 144 µA/MHz Coremark 12.50 13.00 156 163 Dhrystone2.1 13.50 13.00 169 163 Fibonacci 12.50 13.00 156 163 While(1) 10.50 10.50 131 131 Range 1 Boost Mode fHCLK= 120 MHz Reduced code(1) 17.50 16.00 mA 146 133 µA/MHz Coremark 19.50 20.00 163 167 Dhrystone2.1 20.00 20.50 167 171 Fibonacci 19.50 21.00 163 175 While(1) 16.50 16.50 138 138 IDD (LPRun) Supply current in Low-power run fHCLK = fMSI = 2MHz all pripherals disable Reduced code(1) 420 420 µA 210 210 µA/MHz Coremark 435 475 218 238 Dhrystone2.1 485 505 243 253 Fibonacci 475 475 238 238 While(1) 375 515 188 258 1. Reduced code used for characterization results provided in Table 25, Table 29, Table 33. |
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