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TNETX3150 Datasheet(PDF) 7 Page - Texas Instruments |
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TNETX3150 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 78 page ![]() TNETX15AE ADDRESS-LOOKUP DEVICE SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (Continued) DRAM interface TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION DD35† DD34 DD33 DD32 DD31 DD30 DD29 DD28 DD27 DD26 DD25 DD24 DD23 DD22 DD21 DD20 DD19 DD18 DD17 DD16 DD15 DD14 DD13 DD12 DD11 DD10 DD9 DD8 DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0‡ 71 70 69 67 66 65 64 62 61 60 59 57 56 55 54 53 52 51 50 48 47 45 43 42 41 40 38 37 36 35 34 33 32 31 29 28 I DRAM data bus. Data bus is sourced by the TNETX3150/TNETX3150A or the TNETX3100. DCAS 46 I DRAM column address select. DCAS is sourced by the TNETX3150/TNETX3150A or the TNETX3100. DRAS 27 I DRAM row address select. DRAS is sourced by the TNETX3150/TNETX3150A or the TNETX3100. DWE 26 I DRAM write enable. DWE is sourced by the TNETX3150/TNETX3150A or the TNETX3100. † Most-significant bit ‡ Least-significant bit |
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