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TNETX3150 Datasheet(PDF) 47 Page - Texas Instruments

Part # TNETX3150
Description  ADDRESS-LOOKUP DEVICE
PDF  78 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TNETX3150 Datasheet(HTML) 47 Page - Texas Instruments

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TNETX15AE
ADDRESS-LOOKUP DEVICE
SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997
47
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
DIO read cycle
The read-cycle waveforms are shown in Figure 15 and described in the following:
D The TNETX15AE host register address SAD1–SAD0 is asserted while SRNW is held high.
D After a setup time, ESCS goes low, initiating the read cycle.
D After a delay time, with ESCS low, SDATA7–SDATA0 is released from the high-impedance (Z) state.
SDATA7–SDATA0 is driven with valid data and SRDY goes low. The host can access the data.
D ESCS goes high (by the host) to signal completion of the cycle, causing SRDY to deassert. SRDY goes high
for one clock cycle before going into the Z state. SDATA7–SDATA0 also goes to the Z state.
ESCS
Host Address
SRNW
SAD1–SAD0
SDATA7–SDATA0
Data
SRDY
Z
Z
Figure 15. DIO Read-Cycle Waveforms
host (access) register space
The TNETX15AE registers, SRAM (internal and external), and EEPROM are indirectly accessed through the
access registers. The access registers are written/read to/through the DIO interface. There are four byte-wide
access registers. They are individually selected through the SAD bus, as shown in Table 7, and the registers
are read/written through the SDATA bus.
Table 7. DIO Access Register Code
SAD1
SAD0
ACCESS REGISTERS
0
0
DIO address low
0
1
DIO address high
1
0
DIO data
1
1
DIO data auto-increment
Two bytes, DIO address low and DIO address high, are used as a pointer to the address (DIOADR) of the internal
register being selected. DIO address high is the most-significant byte of DIOADR and DIO address low is the
least-significant byte. The DIO address register is byte writeable. The user does not have to write to both DIO
address locations for each access to the internal registers. Up to 216 possible internal locations can be accessed
through the DIO address registers. Some of these first-level indirect registers are themselves address registers
(RAMaddr) for second-level indirect access to even bigger address spaces.



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